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f6c059f
tlb refactor.
bunnitha Feb 4, 2025
41d511f
Add support for `sme2` detection on `aarch64`
gonnet Sep 24, 2024
fd626d6
Add support for `sme2`.
gonnet Sep 24, 2024
29ad3be
Update api.h
gonnet Sep 24, 2024
973bff1
Update hwcap.c
gonnet Sep 24, 2024
3906efd
Update init.c
gonnet Sep 24, 2024
69561b0
Update init.c
gonnet Sep 24, 2024
3513f11
Update hwcap.c
gonnet Sep 24, 2024
14a4639
Update api.h
gonnet Sep 24, 2024
af3ddb4
Tabs instead of spaces
gonnet Sep 24, 2024
ed1a591
Update api.h
gonnet Sep 24, 2024
2179b06
Update hwcap.c
gonnet Sep 24, 2024
6c0517e
Update aarch32-isa.c
gonnet Sep 24, 2024
9d99b4a
Update cpuinfo-mock.h
gonnet Sep 24, 2024
e78569e
Update cpuinfo.h
gonnet Sep 25, 2024
7da22d2
Update cpuinfo.h
gonnet Sep 25, 2024
5ed696a
Update aarch64-isa.c
gonnet Sep 25, 2024
cefeefc
Add `sme`/`sme2` detection to `mach/init.c`.
gonnet Oct 22, 2024
94c276e
Fix formatting.
gonnet Oct 22, 2024
f2c1c9f
Remove unrecognized features.
gonnet Oct 22, 2024
f3ecbbc
Add device info for Astro 55R
GregoryComer Oct 26, 2024
74ead14
Recognize Unisoc UMS, disable neon dot for UMS312
GregoryComer Oct 27, 2024
f0ed560
Detect AMD Zen 5 microarchitecture
fbarchard Nov 14, 2024
d24ec8a
Set the correct L2 size for Ampere Altra (`aarch64`).
gonnet Dec 6, 2024
d4e4eb9
Fix formatting
gonnet Dec 6, 2024
f608a19
Fix formatting.
gonnet Dec 6, 2024
5831a6a
Added changes to cpuinfo.h, isa.c and isa-info.c
rwinterton Dec 10, 2024
c295710
added check for avx512_regs and hex representation change per request
rwinterton Dec 12, 2024
c413b78
change spaces to tab and fix int to bool for RISC.
rrwinterton Jan 7, 2025
510deeb
Update tools/isa-info.c
malfet Jan 8, 2025
0fb2fd6
Update src/x86/isa.c
malfet Jan 8, 2025
551cd20
Update cpuinfo to support AVX10.2 ISA detection
rrwinterton Jan 31, 2025
27bd612
Update isa.c
rrwinterton Jan 31, 2025
3de9f8a
Update isa.c
rrwinterton Jan 31, 2025
64f22b3
Update isa.c
rrwinterton Jan 31, 2025
293cfc7
Update isa.c
rrwinterton Feb 3, 2025
6e37a3e
Update isa.c
rrwinterton Feb 3, 2025
c9d236e
Update isa.c
rrwinterton Feb 3, 2025
cc3f418
pkg-config: use PROJECT_NAME instead of CMAKE_PROJECT_NAME
1480c1 Feb 11, 2025
e51ddbf
- refactor for auto detection
ozanMSFT Mar 14, 2025
1fe5034
- oryon string
ozanMSFT Mar 14, 2025
88989a2
- clang format
ozanMSFT Mar 17, 2025
96cb940
- clang reformat
ozanMSFT Mar 20, 2025
74ce7a0
Fix invalid function pointer cast in cpuinfo.c
davidben Jan 29, 2025
c2bbb02
For Apple silicon, use machdep.cpu.brand_string in preference to deco…
dlenski May 22, 2024
76d3cc8
isa-tool display SME and SME2 for arm
fbarchard Mar 27, 2025
45e895e
Add SME vector length detect
fbarchard Mar 28, 2025
2cdcd5b
cmake: rename duplicate names
1480c1 Feb 12, 2025
af054dd
Fix clang format (#294)
malfet May 22, 2025
0d4a77c
[CI] Update checkout action to v4
malfet May 22, 2025
02519ac
Revert "cmake: rename duplicate names" (#296)
malfet May 22, 2025
8fb65ea
[CI] Fix riscv64-in-qemu build (#295)
malfet May 22, 2025
0cc4241
riscv-hw.c: match kernel type in syscall(). (#292)
enh-google May 23, 2025
2776fcc
update apple soc info (#290)
kimishpatel May 29, 2025
5a1b049
Add Intel Crestmont uarch (#299)
fbarchard Jun 2, 2025
9dd88ad
Disable neon dot on unknown chipsets on aarch32 (#300)
GregoryComer Jun 3, 2025
bed006e
Add Intel Darkmont uarch (#298)
fbarchard Jun 9, 2025
85c3346
Added Willow Cove (#301)
rrwinterton Jun 10, 2025
c5be6dc
Add Intel Gracemont uarch (#303)
fbarchard Jun 26, 2025
02da122
Update cpuinfo.h
gonnet Sep 25, 2024
726f9f9
Add detection for `sme` on `aarch64`.
gonnet Aug 27, 2024
bfde459
Update cpuinfo.h
gonnet Sep 25, 2024
85e1f5d
Merge branch 'pytorch:main' into cpuinfo-modified
bunnitha Jun 27, 2025
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63 changes: 20 additions & 43 deletions src/x86/api.h
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,22 @@ struct cpuinfo_x86_caches {
uint32_t prefetch_size;
};

struct cpuinfo_x86_tlbs {
struct cpuinfo_tlb itlb_4KB;
struct cpuinfo_tlb itlb_2MB;
struct cpuinfo_tlb itlb_4MB;
struct cpuinfo_tlb dtlb0_4KB;
struct cpuinfo_tlb dtlb0_2MB;
struct cpuinfo_tlb dtlb0_4MB;
struct cpuinfo_tlb dtlb_4KB;
struct cpuinfo_tlb dtlb_2MB;
struct cpuinfo_tlb dtlb_4MB;
struct cpuinfo_tlb dtlb_1GB;
struct cpuinfo_tlb stlb2_4KB;
struct cpuinfo_tlb stlb2_2MB;
struct cpuinfo_tlb stlb2_1GB;
};

struct cpuinfo_x86_model_info {
uint32_t model;
uint32_t family;
Expand Down Expand Up @@ -61,21 +77,7 @@ struct cpuinfo_x86_processor {
int linux_id;
#endif
struct cpuinfo_x86_caches cache;
struct {
struct cpuinfo_tlb itlb_4KB;
struct cpuinfo_tlb itlb_2MB;
struct cpuinfo_tlb itlb_4MB;
struct cpuinfo_tlb dtlb0_4KB;
struct cpuinfo_tlb dtlb0_2MB;
struct cpuinfo_tlb dtlb0_4MB;
struct cpuinfo_tlb dtlb_4KB;
struct cpuinfo_tlb dtlb_2MB;
struct cpuinfo_tlb dtlb_4MB;
struct cpuinfo_tlb dtlb_1GB;
struct cpuinfo_tlb stlb2_4KB;
struct cpuinfo_tlb stlb2_2MB;
struct cpuinfo_tlb stlb2_1GB;
} tlb;
struct cpuinfo_x86_tlbs tlb;
struct cpuinfo_x86_topology topology;
char brand_string[CPUINFO_PACKAGE_NAME_MAX];
};
Expand Down Expand Up @@ -109,40 +111,15 @@ CPUINFO_INTERNAL void cpuinfo_x86_detect_cache(
enum cpuinfo_vendor vendor,
const struct cpuinfo_x86_model_info* model_info,
struct cpuinfo_x86_caches* cache,
struct cpuinfo_tlb* itlb_4KB,
struct cpuinfo_tlb* itlb_2MB,
struct cpuinfo_tlb* itlb_4MB,
struct cpuinfo_tlb* dtlb0_4KB,
struct cpuinfo_tlb* dtlb0_2MB,
struct cpuinfo_tlb* dtlb0_4MB,
struct cpuinfo_tlb* dtlb_4KB,
struct cpuinfo_tlb* dtlb_2MB,
struct cpuinfo_tlb* dtlb_4MB,
struct cpuinfo_tlb* dtlb_1GB,
struct cpuinfo_tlb* stlb2_4KB,
struct cpuinfo_tlb* stlb2_2MB,
struct cpuinfo_tlb* stlb2_1GB,
uint32_t* log2_package_cores_max);
struct cpuinfo_x86_tlbs* tlb,
struct cpuinfo_x86_topology* topology);

CPUINFO_INTERNAL void cpuinfo_x86_decode_cache_descriptor(
uint8_t descriptor,
enum cpuinfo_vendor vendor,
const struct cpuinfo_x86_model_info* model_info,
struct cpuinfo_x86_caches* cache,
struct cpuinfo_tlb* itlb_4KB,
struct cpuinfo_tlb* itlb_2MB,
struct cpuinfo_tlb* itlb_4MB,
struct cpuinfo_tlb* dtlb0_4KB,
struct cpuinfo_tlb* dtlb0_2MB,
struct cpuinfo_tlb* dtlb0_4MB,
struct cpuinfo_tlb* dtlb_4KB,
struct cpuinfo_tlb* dtlb_2MB,
struct cpuinfo_tlb* dtlb_4MB,
struct cpuinfo_tlb* dtlb_1GB,
struct cpuinfo_tlb* stlb2_4KB,
struct cpuinfo_tlb* stlb2_2MB,
struct cpuinfo_tlb* stlb2_1GB,
uint32_t* prefetch_size);
struct cpuinfo_x86_tlbs* tlb);

CPUINFO_INTERNAL bool cpuinfo_x86_decode_deterministic_cache_parameters(
struct cpuid_regs regs,
Expand Down
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