Add constraints for cadence idma ops. #12597

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Merged

facebook-github-bot merged 1 commit into pytorch:main from hsharma35:export-D77232760

Sep 3, 2025

+41 −1

Contributor

hsharma35 commented Jul 17, 2025

Summary:
Add memory planning constraints for idma ops:

idma load: output needs to be in DTCM
idma store: input needs to be in DTCM
idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

pytorch-bot bot commented Jul 17, 2025 •

edited

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test_split_group_convolution__applied_by_default

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meta-cla bot added the CLA Signed label

Contributor

facebook-github-bot commented Jul 17, 2025

This pull request was exported from Phabricator. Differential Revision: D77232760

facebook-github-bot added the fb-exported label

hsharma35 force-pushed the export-D77232760 branch from 32e73ff to 47b5c37 Compare

July 18, 2025 22:57

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

Summary:

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

hsharma35 force-pushed the export-D77232760 branch from 47b5c37 to 1001512 Compare

July 18, 2025 22:57

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

47b5c37

Summary:

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

Contributor

facebook-github-bot commented Jul 18, 2025

This pull request was exported from Phabricator. Differential Revision: D77232760

hsharma35 requested a review from skrtskrtfb

July 18, 2025 22:57

Contributor

facebook-github-bot commented Jul 18, 2025

This pull request was exported from Phabricator. Differential Revision: D77232760

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

eaf8ee0

Summary:
Pull Request resolved: pytorch#12597

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

hsharma35 force-pushed the export-D77232760 branch from 1001512 to eaf8ee0 Compare

July 18, 2025 23:01

hsharma35 added the release notes: none label

hsharma35 force-pushed the export-D77232760 branch from eaf8ee0 to 24860ef Compare

September 2, 2025 18:12

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

24860ef

Summary:

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

Contributor

facebook-github-bot commented Sep 2, 2025

This pull request was exported from Phabricator. Differential Revision: D77232760

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

d53716b

Summary:
Pull Request resolved: pytorch#12597

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

hsharma35 force-pushed the export-D77232760 branch from 24860ef to d53716b Compare

September 2, 2025 18:16

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

da5ecb9

Summary:

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

hsharma35 force-pushed the export-D77232760 branch from d53716b to da5ecb9 Compare

September 2, 2025 18:37

Contributor

facebook-github-bot commented Sep 2, 2025

This pull request was exported from Phabricator. Differential Revision: D77232760

hsharma35 force-pushed the export-D77232760 branch from da5ecb9 to 637f0b2 Compare

September 3, 2025 00:22

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

637f0b2

Summary:

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

Contributor

facebook-github-bot commented Sep 3, 2025

This pull request was exported from Phabricator. Differential Revision: D77232760

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

ce713e0

Summary:

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

hsharma35 force-pushed the export-D77232760 branch from 637f0b2 to ce713e0 Compare

September 3, 2025 00:30

Contributor

facebook-github-bot commented Sep 3, 2025

This pull request was exported from Phabricator. Differential Revision: D77232760


          Add constraints for cadence idma ops. (pytorch#12597)

ba97db3

Summary:

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

7f5e782

Summary:
Pull Request resolved: pytorch#12597

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

hsharma35 force-pushed the export-D77232760 branch 2 times, most recently from 7f5e782 to ba97db3 Compare

September 3, 2025 00:34

Contributor

facebook-github-bot commented Sep 3, 2025

This pull request was exported from Phabricator. Differential Revision: D77232760

hsharma35 requested a review from mcremon-meta

September 3, 2025 01:35

zonglinpeng approved these changes

View reviewed changes

hsharma35 added a commit to hsharma35/executorch that referenced this pull request


          Add constraints for cadence idma ops. (pytorch#12597)

d84c4be

Summary:

Add memory planning constraints for idma ops:
1. idma load: output needs to be in DTCM
2. idma store: input needs to be in DTCM
3. idma wait: output aliases the input

Reviewed By: zonglinpeng

Differential Revision: D77232760

facebook-github-bot merged commit ae862f7 into pytorch:main

108 of 115 checks passed

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CLA Signed fb-exported release notes: none