I worked personally on designing 5-stage pipelined rv32i processor for some of the instructions like add,addi,sub,etc.. PLEASE CONTACT ME AT SIDHANT PRIYADARSHI LINKEDIN BEFORE COPYING THE SOURCE CODE AS ITS MY PERSONALL WORK.
Link to CoCoTb Report : https://www.linkedin.com/posts/sidhant-priyadarshi-028612185_fcfs-rtl2gds-activity-6968104525094080514-U3my?utm_source=share&utm_medium=member_desktop