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1. axi axi Public

   Forked from pulp-platform/axi

   AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

   SystemVerilog 1

2. common_verification common_verification Public

   Forked from pulp-platform/common_verification

   SystemVerilog modules and classes commonly used for verification

   SystemVerilog 1

3. common_cells common_cells Public

   Forked from pulp-platform/common_cells

   Common SystemVerilog components

   SystemVerilog 1

4. axi_mem_if axi_mem_if Public

   Forked from pulp-platform/axi_mem_if

   Simple single-port AXI memory interface

   SystemVerilog 1

5. fusesoc fusesoc Public

   Forked from olofk/fusesoc

   Package manager and build abstraction tool for FPGA/ASIC development

   Python 1

6. edalize edalize Public

   Forked from olofk/edalize

   An abstraction library for interfacing EDA tools

   Python 1