Fix bug regarding the setFullScale function on the H3LIS331DL & LIS3DH #2
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Previous behaviour incorrectly set the ranges. Attempting to set a 100g range would actually set the data to come out in little endian order. Attempting to set a 200g range would actually set the data to come out in little endian order AND put the FS1/FS0 bits into an invalid state (10) Attempting to set a 400g range would actually set the data to come out in big endian order AND put the FS1/FS0 bits into an invalid state (10). Now we correctly set the range bits and leave little / big endian alone.
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santaimpersonator
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Dec 30, 2019
Update release for fix in issue #2.
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Previous behaviour incorrectly set the ranges.
Attempting to set a 100g range would actually set the data to come out
in little endian order.
Attempting to set a 200g range would actually set the data to come out
in little endian order AND put the FS1/FS0 bits into an invalid state
(10)
Attempting to set a 400g range would actually set the data to come out
in big endian order AND put the FS1/FS0 bits into an invalid state (10).
Now we correctly set the range bits and leave little / big endian alone.