v0.15.0

Common changes:

• Strip prefixes from many peripheral registers (#661)
• Add SVDTOOLS env value for specifying patching tool (#673)
• Fix HTML generation on macOS (#679)
• Replace Python svd tools with Rust alternatives (#701)
• Added missing TIMx:CR1:OPM, removed unused CNT_H, ARR_H, CCR_H (#684)
• Use PascalCase for generated values of enums (#727)
• Updated to svd2rust 0.24.0 (#733)
• Document RTC ALARM and BKPR (#724)
• Extensive internal refactor of GPIO patches (#717)
• Change groupName of ADC_Common to ADC_Common (#719)
• Fix field access on many SAI fields (#691)

Family-specific:

• G0:

  • G0B1/G0C1: Update SVDs (#666)
  • G0B1/G0C1: Fix previous incorrect deletion of DMA1/2 (#675)
  • Clear all vendor provided enumeratedValues (#686)
  • Update SVDs, document DMA, various other patches (#687)
  • Make FLASH_WRP??R and FLASH_SECR writeable (#690)
  • G070: Rename SYSCFG_VREFBUF to SYSCFG, remove VREFBUF registers (#716)
  • Fix DMA and TIM15 register field names (#695)

• G4:

  • Fix ADC ADSTP, ADSTART, ADDIS, ADEN bit enumerations (#699)
  • Remove RNGSMEN -> RNGEN renaming to have AHB2SMENR.RNGSMEN (#729)

• H7:

  • h747: add midding DSI interrupt (#646)
  • h735, h7b3: remove unavailable DSI peripheral (#648)
  • Make ETH_MAC MMC mask register writable (#658)
  • RM0455: Fix incorrect rename of OCTOSPI peripheral (#653)
  • Arrayify HASH registers (#663)
  • Add bit ranges to HDMI CRC registers (#671)
  • H743/H753: Fix Overdrive and BDMADR fields (#649)
  • h7b3: clear all enumeratedValues (#686)
  • Change DMA CR to only cover SxCR, not LIFCR and HIFCR (#702)
  • H735: Add TIM23 and TIM24 (#712)
  • Fix ADC ADSTP, ADSTART, ADDIS, ADEN bit enumerations (#699)
  • Arrayify HSEM registers (#735, #737)
  • h747: add flash registers mirrored in bank2 (#704)
  • H735: Add CORDIC and FMAC peripherals (#677)
  • H735: Add missing TIM1, DCMI, OTG USB, RNG, LTDC, RAMECC interrupts (#677)
  • Rename DBGSTBD1, DBGSTPD1, DBGSLPD1 fields to match RM (#677)
  • RM0468: Add UART9/USART10, RM0455: fix USART base addresses (#652)

• F0:

  • F0x1/2/8: Add bit ranges to HDMI CRC registers (#671)
  • Add missing CRC POL register (#710)

• F2:

  • Fix incorrect bit position for Ethernet MMCTIMR TGFM (#689)
  • Add ADC EXTSEL enumerations (#707)
  • Apply existing OTG_FSv1 fixes (#706)

• F3:

  • Add missing 'P' to JADST (#696)
  • Fix ADC ADSTP, ADSTART, ADDIS, ADEN bit enumerations (#699)
  • Fix various fields access (#734)
  • F302: Rename DAC to DAC1 (#742)

• F4:

  • F469: Fix DSIHSOT_CCR register name (#664)
  • Fix incorrect bit position for Ethernet MMCTIMR TGFM (#689)
  • F411: Fix OTG_FS registers (#697)
  • Add ADC EXTSEL enumerations (#707)
  • Add GTPR register to UART (#713)
  • Document TIM2 ITR1_RMP enums (#678)
  • F410/411/412: add BDCR LSEMOD field (#708)

• F7:

  • Add SDMMC2EN and SDMMC2RST to F765, F7x7, F7x9 (#662)
  • Fix incorrect bit position for Ethernet MMCTIMR TGFM (#689)
  • Add bit ranges to HDMI CRC registers (#671)
  • Add ADC EXTSEL enumerations (#707)
  • Fix ADC DR RDATA name and description (#723)
  • Document safe ranges for CNT/ARR/CCR (#700)
  • Arrayify JPEG memory registers (#725)

• L0:

  • Re-add TIM21/TIM22 (#659)
  • Fix various fields access (#734)

• L4:

  • Add documentation for FIREWALL (#660)
  • Arrayify HASH registers (#663)
  • L4R9: Fix DSIHSOT interrupt name (#664)
  • L4R9: Add TIM3 and TIM4 (#669)
  • L4x5/6/R9: Rename DBGMCU APB_FZR to remove underscores (#681)
  • Add GPIOx ASCR and BRR registers (#680)
  • Added missing channel 2 on TIM15 (#705)
  • Fix ADC RDATA field name and description. (#723)
  • Add more enums for clock selection registers (#720)
  • Rename Polynomialcoefficients field to POL (#710)
  • Remove COMP1/COMP2 prefix from field names, document fields (#682)
  • Add L4R5 device (#740)

• L5:

  • Fix DMA CCR fields, arrayify GTZC VCTR (#715)

• WB:

  • Arrayify HSEM registers (#735, #737)

• WL:

  • Put all timers into common TIM group (#657)
  • Fix various fields access (#734)
  • Arrayify HSEM registers (#735, #737)

Contributors to this release:

@LeonSkoog @kenbell @ryan-summers @burrbull @richardeoin
@systec-ms @DerFetzer @newAM @jspngh @jamwaffles @sephamorr
@MathiasKoch @omion @davidlattimore @Sh3Rm4n @Windfisch @sorki
@taylorh140 @reitermarkus @larchuto @jonas-schievink @tim-seoss
@Wassasin @Gekkio @korken89 @maximeborges @sphw @dgoodland
@X-yl @disasm @Pagten @oldsheep68 @TomDeRybel @mattcarp12

What's Changed

• Add missing DSI interrupt number for Stm32h747cm4 and Stm32h747cm7 by @LeonSkoog in #646
• Remove DSI module from unsupported devices by @LeonSkoog in #648
• wl5x / wle5: put all timers in TIM group by @kenbell in #657
• Updating STM32H7 ETH_MAC MMC mask register writable by @ryan-summers in #658
• strip prefixes by @burrbull in #661
• Fix rename of H7 RM0455 OCTOSPI peripheral by @richardeoin in #653
• L4 Firewall same as L0 by @burrbull in #660
• Add SDMMC2EN and SDMMC2RST to F765, F7x7, F7x9 by @systec-ms in #662
• more hash arrays by @burrbull in #663
• DSIHSOT by @burrbull in #664
• Update SVDs for STM32G0B1/C1 by @DerFetzer in #666
• Add bit ranges to HDMI CEC registers by @newAM in #671
• registers must be dict by @burrbull in #672
• devices/stm32l4r9.yaml: patch TIM3 and TIM4 by @jspngh in #669
• SVDTOOLS env value by @burrbull in #673
• g0: fix_delete DMA by @burrbull in #675
• bump svd2rust to 0.20 by @burrbull in #676
• Readd TIM21/TIM22 to l0xx series by @jamwaffles in #659
• Fix make html on macOS with python 3.8+ by @sephamorr in #679
• Fix Overdrive and BDMADR fields on h743/h753 by @sephamorr in #649
• STM32L4x1/L4x2/L4x3: Rename DBGMCU APB_FZR registers to match general convention by @MathiasKoch in #681
• STM32L4xx: Add GPIOx ASCR & BRR registers by @MathiasKoch in #680
• clear all vendor provided enumeratedValues for g0 and h7b3 by @burrbull in #686
• svd2rust 0.21 by @burrbull in #688
• F2/F4/F7 Ethernet: Fix MMCTIMR TGFM bit position by @adamgreig in #689
• Rust svdtools for CI by @burrbull in #701
• Change H7 DMA CR patch to only include SxCR registers by @omion in #702
• Run sudo apt-get update before installing a package by @richardeoin in #709
• G0 by @burrbull in #687
• Add timers TIM23 and TIM24 to stm32h735 by @omion in #712
• Make FLASH_WRP??R and FLASH_SECR writable by @davidlattimore in #690
• F301: Add missing P to JADST by @Sh3Rm4n in #696
• Fix ADC disable by @Sh3Rm4n in #699
• svd2rust 0.22 by @burrbull in #714
• svd2rust 0.22.2 by @burrbull in #718
• TIM10-14 OPM by @burrbull in #684
• stm32f411 otg fixes by @Windfisch in #697
• svd2rust 0.23 by @burrbull in #726
• Description fixes by @sorki in #728
• Use PascalCase for values of enums by @burrbull in #727
• Added missing Enumerations. by @taylorh140 in #707
• svd2rust 0.24 by @burrbull in #733
• access fixes by @burrbull in #734
• HSEM arrays by @burrbull in #735
• ci: fix github pages build by @newAM in #736
• HSEM fix by @burrbull in #737
• RTC: alarm, bkpr by @burrbull in #724
• Fix L4 ADC?.DR.RDATA field name and description. by @reitermarkus in #723
• Add more enums for L4 clock selections. by @reitermarkus in #720
• GPIOx cleanup and improvement by @larchuto in #717
• Add Stm32l4r5 by @mattcarp12 in #740
• F302: rename DAC to DAC1 by @jonas-schievink in #742
• f4xx: UART fix missing Guard Time and Prescaler Register, f413 UART shouldn't include USART-only fields. by @tim-seoss in #713
• g4 RCC Remove RNGSMEN -> RNGEN by @sorki in #729
• Add SYSCFG to stm32g070 by @Wassasin in #716
• F7/tim: access to bits() without unsafe for single-field registers by @maximeborges in #700
• Apply OTG_FS v1 fixes to F215/F217 by @Gekkio in #706
• H7 flash: Add registers that are mirrored between banks for rm0399 by @richardeoin in #704
• Added CH2 on TIM15 for STM32L4 by @korken89 in #705
• Fix various issues with STM32L562 by @sphw in #715
• f7 jpeg mem by @burrbull in #725
• Add enumerated values for STM32F405/415/407/417/427/437/429/439 TIM2 ITR1_RMP by @dgoodlad in #678
• Add missing BDCR LSEMOD field for STM32F410/11/12 by @X-yl in #708
• Change the groupName of ADC_Common from ADC to ADC_Common by @cpunion in #719
• Fix STM32G0 SVDs by @Disasm in #695
• CRC peripheral corrections by @Pagten in #710
• sai by @burrbull in #691
• shorter registernames for stm32l4 devices of the COMP registers + add… by @oldsheep68 in #682
• STM32H735 yaml fixes by @TomDeRybel in #677
• H7: Add UART9/USART10 for RM0468 parts, fix base address for RM0455 parts by @richardeoin in #652
• Prepare for v0.15.0 release by @adamgreig in #746

New Contributors

• @LeonSkoog made their first contribution in #646
• @systec-ms made their first contribution in #662
• @DerFetzer made their first contribution in #666
• @jspngh made their first contribution in #669
• @jamwaffles made their first contribution in #659
• @sephamorr made their first contribution in #679
• @MathiasKoch made their first contribution in #681
• @omion made their first contribution in #702
• @davidlattimore made their first contribution in #690
• @Windfisch made their first contribution in #697
• @sorki made their first contribution in #728
• @taylorh140 made their first contribution in #707
• @reitermarkus made their first contribution in #723
• @larchuto made their first contribution in #717
• @mattcarp12 made their first contribution in #740
• @tim-seoss made their first contribution in #713
• @Gekkio made their first contribution in #706
• @sphw made their first contribution in #715
• @dgoodlad made their first contribution in #678
• @X-yl made their first contribution in #708
• @cpunion made their first contribution in #719
• @oldsheep68 made their first contribution in #682
• @TomDeRybel made their first contribution in #677