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Add HDL file list files #2349

Add HDL file list files

Add HDL file list files #2349

Workflow file for this run

name: Processor
on:
push:
branches:
- main
paths:
- 'rtl/**'
- 'sw/**'
- 'sim/**'
- '.github/workflows/**'
pull_request:
branches:
- main
paths:
- 'rtl/**'
- 'sw/**'
- 'sim/**'
- '.github/workflows/**'
workflow_dispatch:
jobs:
Software:
runs-on: ubuntu-latest
steps:
- name: '🧰 Repository Checkout'
uses: actions/checkout@v4
- name: '⚙️ Build Software Framework Tests'
uses: docker://ghcr.io/stnolting/neorv32/sim
with:
args: ./do.py SoftwareFrameworkTests
Simple:
runs-on: ubuntu-latest
name: 'Simple testbench'
strategy:
fail-fast: false
matrix:
example:
- processor_check
- hello_world
steps:
- name: '🧰 Repository Checkout'
uses: actions/checkout@v4
- name: '🚧 Build and install software; then simulate with shell script'
uses: docker://ghcr.io/stnolting/neorv32/sim
# Redirect UART0 TX to text.io simulation output via <UARTx_SIM_MODE> user flags
with:
args: >-
make -C sw/example/${{ matrix.example }}
clean_all
USER_FLAGS+="-DUART0_SIM_MODE -DUART1_SIM_MODE -flto"
EFFORT=-Os
MARCH=rv32ima_zicsr_zifencei
info
all
sim-check
VUnit:
runs-on: ubuntu-latest
steps:
- name: '🧰 Repository Checkout'
uses: actions/checkout@v4
- name: '⚙️ Build and install Processor Check software'
uses: docker://ghcr.io/stnolting/neorv32/sim
with:
args: >-
make -C sw/example/processor_check
clean_all
USER_FLAGS+=-DUART0_SIM_MODE
USER_FLAGS+=-DSUPPRESS_OPTIONAL_UART_PRINT
USER_FLAGS+=-flto
MARCH=rv32imac_zicsr_zifencei
info
all
- name: '📤 Archive Processor Check application image'
uses: actions/upload-artifact@v4
with:
name: application
path: rtl/core/neorv32_application_image.vhd
- name: '🚧 Run Processor Hardware Tests with VUnit'
uses: VUnit/vunit_action@master
with:
image: ghcr.io/stnolting/neorv32/sim
cmd: ./sim/run.py --ci-mode -v