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[AVR] Initial AVR support #74818
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[AVR] Initial AVR support #74818
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Would AVR need its own platform name or would the architecture conditional suffice? Embedded Swift is usually platform-agnostic (if we managed to compile a tiny Linux kernel for AVR, we would write Swift for this OS via |
It should not, the standard conditionals should suffice. I think when building for these targets we will use one or more triple from the following set: The vendor part will be interesting to figure out. |
@rauhul @harlanhaskins ... they sound like good ideas.
To be honest, when I made these changes, I was partly copying other people's PRs where they were adding architectures. All I really wanted was to be able to add I'd be completely happy with (Subarch and vendor are irrelevant on AVR.) |
I think all you really need is to make sure the compiler recognizes AVR as an architecture, and that AVR implies 16 bit. Then you just need to tell the embedded seam routines to build a swift standard library for 16 bit AVR, and then clients will just be able to compile for AVR, import the standard library, and manually link/search for Arduino headers |
If we did want specific support for Arduino as a named platform, along with searching for those headers and writing an overlay, for example, that could be done. I suspect that should be done outside of this PR though, and I'm curious if @rauhul has more opinions on how to do that. |
Actually we are quite separate from the Arduino platform. Most code written for our platform doesn’t use Arduino headers or libraries at all. We quite often use avr libc which is a much older and more widely used set of libraries. But again it’s really optional. A lot of us are writing pure Swift code with our own pure Swift hardware libraries. The only thing that might be needed to build valid binaries are some custom linker scripts. But that’s only if we want to go as far as having Swift do the full link. For now I think a great first step would be just compiling object files. In fact probably just getting to the Bitcode stage would be enough. In our own tooling we only ever use Swift to compile to Bitcode and then let other tools take over from there. |
I suggest we define a first goal to just accept AVR as a target CPU in the compiler and be able to start the compilation. For that we will need some parts of this PR, plus some more (hopefully trivial) changes. I think we should drop from this PR everything that's not the minimal set of changes to get there. (Or open a new PR and leave this as a reference.) Specifically, I think we'll need:
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I'm a little bit guessing with build-presets.ini as it's a bit opaque to me. Feel free to tweak anything. I didn't have time to write tests yet as it's after midnight and I have to get up for work tomorrow. I'll try to pick it up again tomorrow or Thursday. |
@swift-ci please smoke test |
Actually, we'll also need to fix the default set of |
I'd appreciate some help/advice how to fix the broken test? https://ci.swift.org/job/swift-PR-macos-smoke-test/14213/consoleFull#-1588501433d6fdb6cb-f376-4f2e-8bce-d31c7304698b It looks like it's not emitting the expected fixit and is instead suggesting avr as a possible fixit, which I think is not what we would like (I don't mind if swift suggests arm, or x86 or riscv or avr... so long as these more rare architectures are further down the list). Could someone suggest how I might fix this please? |
It's an interesting question, I'm not sure what architecture the fixit should suggest. It appears to suggest bad options in either case (arm or avr) and it seems like suggesting an arch based Levenshtein distance would be a much better UX. @DougGregor do you happen to have opinions on behavior of the target conditional fixits with the addition of the AVR architecture? For reference the lit errors are below:
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It is using Levenshtein distance. I think the test here is unfortunate and the easiest thing to fix. The edit distance between I recommend updating the test to be more realistic: replace |
Serves me right for not reading the implementation before typing, thanks for the correction! I think updating the test with |
@swift-ci please smoke test |
Yes. When I’m trying to avoid register tearing things like that I suppress interrupts and re-enable them after. It’s all very basic. They are very simple processors!If it’s best to remove this from the PR then I’m happy to. Whatever is best?On 3 Jul 2024, at 18:06, Rauhul Varma ***@***.***> wrote:
@rauhul commented on this pull request.
In lib/Basic/LangOptions.cpp:
@@ -391,6 +392,10 @@ void LangOptions::setHasAtomicBitWidth(llvm::Triple triple) {
setMaxAtomicBitWidth(128);
break;
+ case llvm::Triple::ArchType::avr:
+ setMaxAtomicBitWidth(0);
if I recall correctly there are no atomic instructions, but you can mask interrupts do some ops and unmask
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Sounds like a good idea. CheersOn 3 Jul 2024, at 17:35, Doug Gregor ***@***.***> wrote:
It's an interesting question, I'm not sure what architecture the fixit should suggest. It appears to suggest bad options in either case (arm or avr) and it seems like suggesting an arch based Levenshtein distance would be a much better UX.
@DougGregor do you happen to have opinions on behavior of the target conditional fixits with the addition of the AVR architecture? For reference the lit errors are below:
It is using Levenshtein distance. I think the test here is unfortunate and the easiest thing to fix. The edit distance between leg and arm is 3, as it is with avr, which is why we're seeing the test failure here.
I recommend updating the test to be more realistic: replace leg with arn, which has an edit distance of 1 and is therefore more robust against adding new architectures.
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It’s more of a todo.But you have to be pretty careful on AVR. The back end handles some things for you. For example in some cases when you read or change a 16 bit register you must read and write the bytes in a specific order to avoid the possibility of tearing if interrupts are enabled.But I think you don’t normally get CAS instructions on most AVR chips, that kind of thing. I think.I wonder if llvm atomic instructions may not lower to anything meaningful.I’m happy to either remove this change and see if it causes trouble (we can always easily add it later). Or if you guys prefer I can check through the tablegen etc to get a definitive answer what atomic IR ops do?On 3 Jul 2024, at 17:43, Kuba (Brecka) Mracek ***@***.***> wrote:
@kubamracek commented on this pull request.
In lib/Basic/LangOptions.cpp:
@@ -391,6 +392,10 @@ void LangOptions::setHasAtomicBitWidth(llvm::Triple triple) {
setMaxAtomicBitWidth(128);
break;
+ case llvm::Triple::ArchType::avr:
+ setMaxAtomicBitWidth(0);
Is this a "TODO, deal with this later" or is there really no atomics on AVR? Any details about this?
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@rauhul @kubamracek I think I fixed the broken unit test, at least it works locally, I also added a very basic parse test that should check the architecture exists and a couple of basic features, modelled on wasm. And suggested a tiny documentation tweak. I hope this is useful. |
@swift-ci please smoke test |
@swift-ci please smoke test |
@swift-ci please smoke test Linux |
All tests passed do you want to review it now? |
Other than the small note, this looks good to me to go in. If you don't mind, could you wait with merging until let's say Tuesday to see if there's any more review comments from others (it's a Friday after a holiday in the US)? |
Oh and one more thing: Because we went back and forth on some of the changes, I'd suggest squashing the commits before merging and also expanding on the commit message to make it more clear that this isn't actually yet a meaningful AVR support, but just the first step towards it. |
Sounds like a good idea. Also the squash and clarify that this is a first basic step. On 5 Jul 2024, at 22:28, Kuba (Brecka) Mracek ***@***.***> wrote:
Other than the small note, this looks good to me to go in. If you don't mind, could you wait with merging until let's say Tuesday to see if there's any more review comments from others (it's a Friday after a holiday in the US)?
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Ok. I’ll take a look. I must admit I’m not strong on cmake!On 5 Jul 2024, at 22:25, Kuba (Brecka) Mracek ***@***.***> wrote:
@kubamracek commented on this pull request.
In cmake/modules/SwiftSetIfArchBitness.cmake:
@@ -6,7 +6,9 @@ function(set_if_arch_bitness var_name)
"" # multi-value args
${ARGN})
- if("${SIA_ARCH}" STREQUAL "i386" OR
+ if("${SIA_ARCH}" STREQUAL "avr")
+ set("${var_name}" "${SIA_CASE_16_BIT}" PARENT_SCOPE)
This probably also needs an extension on line 5, otherwise I think it's not doing anything?
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- Add simple support for the AVR architecture, as a supported conditional compilation value, and added to the default llvm targets to build. (Later PRs will fix support for 16-bit pointers, which is broken in places, and any fixes needed to get the standard library to build.) (Note: AVR as a target is expected to always be compiled with -enable-experimental-feature Embedded.)
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OK @kubamracek. I think I've addressed all your concerns. This seems like a good first PR now. |
@swift-ci please test |
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Step 1 ✅
Hi @kubamracek @rauhul should we tag anyone else who needs to review this? p.s. I don't think I have permission to merge it anyway, so someone else will have to do that when it's time. |
Let's go ahead and merge this. Thank you @carlos4242! |
🎉 |
This adds support for the AVR target to Swift. It is a preliminary draft PR for discussion.
@rauhul @phausler @kubamracek
Note: names like "Embedded" I created many years ago, when it was only us using this code. This would probably not make sense now, but it gives you ideas of what we have been using and is a kick off point for discussion.
(See also #74817)