v0.0.3 — Agent-driven scheduling

TileFoundry 0.0.3 introduces agent-driven, instruction-level scheduling, restructures analysis, and adds prefill examples on H200 and Apple AMX.

pip install tilefoundry==0.0.3

Instruction-level schedule

The compiler lists the instructions that can implement each HIR operation, the agent chooses among them, and the compiler lowers the chosen schedule to TIR.

• tilefoundry schedule candidates and tilefoundry schedule facts show which instructions can implement each operation of an HIR program, and what each instruction requires. (#189, #192)
• tf.schedule records the chosen instructions, and tilefoundry schedule finalize lowers the scheduled HIR to TIR. (#192, #193)
• Instructions are declared as AtomSched operations with explicit TIR operand contracts, starting with CUDA MMA atoms, SM90 WGMMA and async copies. (#186, #187, #190)
• Lowering keeps storage plans separate from instruction plans, and instruction matching follows one path for every target. (#231, #243)
• Block-scaled FP8 GEMM runs through SM90 WGMMA down to TIR, and sparse decode is carried through TIR. (#213, #223)
• The new scheduling tutorial follows an 8192 × 5120 by 5120 × 17408 GEMM to AtomSched's best H200 kernel. (#193)

Restructured analysis

• Memory: analysis models staged memory allocation, footprints and reuse windows, and loop-aware buffer lifetimes. (#191, #179, #170)
• Cost: work and traffic are counted per executing scope, and every access relation states what its operation reads. (#199, #210)
• Structure: definition facts, valuation contexts and scope snapshots go through one visit-context mechanism, and projections are reused so each corpus case is analysed once. (#238, #245, #198)
• Loop starts may depend on the executing unit. (#175)

Examples

• Qwen3.8-27B prefill, 1024 – 8192 tokens: a 64-layer gated-delta-net / attention hybrid on one H200, at 80.29 / 309.61 / 631.19 ms against SGLang's 89.06 / 317.11 / 638.25 ms. (#229)
• Qwen3.8-27B prefill, 128 – 1024 tokens: across the roofline ridge, 1.88x / 1.41x / 1.10x / 1.03x faster than SGLang at 128 / 256 / 512 / 1024 tokens. (#236)
• Qwen prefill on Apple AMX: Qwen3-1.7B and Qwen3.5-4B text prefill on an M2 Pro, with the large projections as FP16 AMX outer products. (#244)

Both Qwen3.8-27B runs produce the same first token as transformers at every length.

Other features

• Scaffold standalone CUDA projects through Target code generators. (#227)
• Operation attributes and lexical layout sugar in the parser; placed types print as parser sugar; a canonical TIR parser and printer. (#221, #166, #156)
• Swizzled composed layouts expressed the way CuTe expresses them. (#174)
• Each program loads its own shard of a checkpoint.
• Minimal Apple AMX instruction support. (#244)

Bug fixes

• CUDA codegen emits effect-form Cast, Fill through kernel-parameter views, and MeshCoord / Dim-arithmetic slice coordinates. (#240)
• Lowering preserves storage scopes and printer contracts. (#233)
• The allocation and lowering findings of #237 are corrected. (#241)
• Mesh-scoped calls are enforced, scalar windows fixed, and broadcasts supported on symbolic meshes. (#220, #208)
• Memory metadata and traffic are normalised, and recursive ISL range traversal is avoided. (#176, #184)

Known issues

• The wheel does not ship TileFoundry's CUDA runtime headers yet, so tf.compile from an installed package cannot build CUDA kernels. Use a source checkout for CUDA compilation; a fix is planned for the next release.
• The performance timeline misprices insert_slice / tf.zeros across mesh positions and does not show mesh-lane under-fill. (#239)

Thanks

Thanks to @sablin39 for the CUDA codegen fixes in #240.