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Merge pull request #329 from mithro/litex-update
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Update third_party modules.
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mithro committed Jul 22, 2017
2 parents bc835e3 + bcedb07 commit 64972e6
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Showing 10 changed files with 11 additions and 11 deletions.
4 changes: 2 additions & 2 deletions .travis.yml
Original file line number Diff line number Diff line change
Expand Up @@ -33,12 +33,12 @@ env:
# - PLATFORM=netv2
# - PLATFORM=nexys_video
# - PLATFORM=pipistrello
- CPU=lm32 PLATFORM=opsis SKIP_TARGETS="hdmi2usb\|video.*"
- CPU=lm32 PLATFORM=opsis SKIP_TARGETS="hdmi2usb\|video.*\|memtest"
- CPU=or1k PLATFORM=opsis TARGETS="base net"
- PLATFORM=opsis TARGET=video
- PLATFORM=opsis TARGET=hdmi2usb
# - PLATFORM=sim
- CPU=lm32 PLATFORM=mimasv2
- CPU=lm32 PLATFORM=mimasv2 TARGETS="base"
- CPU=or1k PLATFORM=mimasv2 TARGETS="base" # or1k and memtest don't fit on mimasv2

install:
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2 changes: 1 addition & 1 deletion third_party/litesata
2 changes: 1 addition & 1 deletion third_party/liteusb
2 changes: 1 addition & 1 deletion third_party/litevideo
2 changes: 1 addition & 1 deletion third_party/litex
Submodule litex updated 78 files
+3 −0 .gitmodules
+5 −3 README
+5 −0 litex/boards/platforms/arty.py
+1 −1 litex/boards/platforms/nexys_video.py
+138 −0 litex/boards/platforms/versaecp55g.py
+7 −6 litex/boards/targets/arty.py
+30 −43 litex/boards/targets/kc705.py
+7 −10 litex/boards/targets/nexys_video.py
+9 −1 litex/boards/targets/sim.py
+15 −3 litex/build/lattice/diamond.py
+6 −2 litex/build/lattice/programmer.py
+11 −0 litex/build/sim/README
+42 −0 litex/build/sim/config.py
+40 −0 litex/build/sim/core/Makefile
+14 −0 litex/build/sim/core/error.h
+366 −0 litex/build/sim/core/libdylib.c
+118 −0 litex/build/sim/core/libdylib.h
+159 −0 litex/build/sim/core/modules.c
+40 −0 litex/build/sim/core/modules.h
+14 −0 litex/build/sim/core/modules/Makefile
+5 −0 litex/build/sim/core/modules/clocker/Makefile
+109 −0 litex/build/sim/core/modules/clocker/clocker.c
+17 −0 litex/build/sim/core/modules/ethernet/Makefile
+258 −0 litex/build/sim/core/modules/ethernet/ethernet.c
+1 −0 litex/build/sim/core/modules/ethernet/tapcfg
+9 −0 litex/build/sim/core/modules/rules.mak
+5 −0 litex/build/sim/core/modules/serial2console/Makefile
+183 −0 litex/build/sim/core/modules/serial2console/serial2console.c
+5 −0 litex/build/sim/core/modules/serial2tcp/Makefile
+258 −0 litex/build/sim/core/modules/serial2tcp/serial2tcp.c
+5 −0 litex/build/sim/core/modules/variables.mak
+80 −0 litex/build/sim/core/pads.c
+28 −0 litex/build/sim/core/pads.h
+339 −0 litex/build/sim/core/parse.c
+243 −0 litex/build/sim/core/sim.c
+804 −0 litex/build/sim/core/tinydir.h
+40 −0 litex/build/sim/core/veril.cpp
+16 −0 litex/build/sim/core/veril.h
+0 −492 litex/build/sim/dut_tb.cpp
+20 −0 litex/build/sim/platform.py
+102 −104 litex/build/sim/verilator.py
+10 −7 litex/build/xilinx/common.py
+2 −0 litex/build/xilinx/ise.py
+25 −25 litex/build/xilinx/programmer.py
+33 −4 litex/build/xilinx/vivado.py
+3 −1 litex/gen/fhdl/decorators.py
+9 −5 litex/gen/fhdl/specials.py
+24 −2 litex/gen/fhdl/structure.py
+3 −2 litex/gen/fhdl/tools.py
+14 −6 litex/gen/fhdl/verilog.py
+18 −15 litex/gen/genlib/cdc.py
+1 −0 litex/gen/genlib/fifo.py
+5 −2 litex/gen/genlib/record.py
+4 −4 litex/gen/sim/core.py
+1 −1 litex/gen/util/misc.py
+27 −0 litex/soc/cores/dna.py
+67 −0 litex/soc/cores/frequency_meter.py
+1 −1 litex/soc/cores/identifier.py
+44 −0 litex/soc/cores/uart.py
+64 −0 litex/soc/cores/xadc.py
+10 −14 litex/soc/integration/builder.py
+4 −3 litex/soc/integration/cpu_interface.py
+6 −3 litex/soc/integration/soc_core.py
+35 −9 litex/soc/interconnect/stream.py
+5 −3 litex/soc/interconnect/stream_packet.py
+6 −6 litex/soc/interconnect/wishbonebridge.py
+1 −1 litex/soc/software/libbase/id.c
+2 −0 litex/soc/tools/remote/__init__.py
+5 −5 litex/soc/tools/remote/comm_pcie.py
+3 −5 litex/soc/tools/remote/comm_udp.py
+4 −8 litex/soc/tools/remote/etherbone.py
+42 −19 litex/soc/tools/remote/litex_server.py
+1 −0 setup.py
+0 −0 test/__init__.py
+69 −0 test/test_bitslip.py
+106 −0 test/test_code_8b10b.py
+43 −0 test/test_gearbox.py
+44 −0 test/test_targets.py
2 changes: 1 addition & 1 deletion third_party/merge-upstream.sh
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Expand Up @@ -2,7 +2,7 @@

set -e

TARGETS=${@-$(find * -maxdepth 0 -type d | grep -v micropython | grep -v qemu)}
TARGETS=${@-$(find * -maxdepth 0 -type d | grep -v micropython | grep -v qemu | grep -v libuip)}

COMMIT_MSG=$(tempfile) || exit
trap "rm -f -- '$COMMIT_MSG'" EXIT
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