Issue in nexys_video gateware with RS232PHYTX #42

mithro · 2018-08-28T05:36:56Z

./build/nexys_video_net_lm32/output.20180828-035725.log
---------------------------------------------
Traceback (most recent call last):
  File "./make.py", line 143, in <module>
    main()
  File "./make.py", line 108, in main
    soc = SoC(platform, ident=SoC.__name__, **soc_sdram_argdict(args), **dict(args.target_option))
  File "/home/travis/build/timvideos/HDMI2USB-litex-firmware/targets/nexys_video/net.py", line 29, in __init__
    BaseSoC.__init__(self, platform, *args, **kwargs)
  File "/home/travis/build/timvideos/HDMI2USB-litex-firmware/targets/nexys_video/base.py", line 121, in __init__
    self.submodules.uart_multiplexer = UARTMultiplexer(uart_interfaces, self.uart_phy)
  File "/home/travis/build/timvideos/HDMI2USB-litex-firmware/third_party/litex/litex/soc/cores/uart.py", line 245, in __init__
    uart.tx.eq(uarts[n].tx),
  File "/home/travis/build/timvideos/HDMI2USB-litex-firmware/third_party/migen/migen/fhdl/module.py", line 136, in __getattr__
    raise AttributeError("'"+self.__class__.__name__+"' object has no attribute '"+name+"'")
AttributeError: 'RS232PHYTX' object has no attribute 'eq'

The text was updated successfully, but these errors were encountered:

enjoy-digital · 2018-08-28T06:53:07Z

You need to use:

self.submodules.uart_multiplexer = RS232PHYMultiplexer(uart_interfaces, self.uart_phy)

enjoy-digital · 2018-08-28T06:54:41Z

@mithro: can you give me permissions to the repo so that i can do these changes directly when i'm refactoring code?

mithro · 2018-08-29T07:10:21Z

@enjoy-digital I believe this is done now. Can you check?

Fixes litex-buildenv timvideos#42.

* litedram changed from ea1ac4d to 5820970 * 5820970 - frontend/crossbar: fix timvideos#49 <Florent Kermarrec> * 5fb8afe - frontend/axi: omit bank in rdata connect <Florent Kermarrec> * 06ca53d - Merge pull request timvideos#48 from enjoy-digital/staging <enjoy-digital> |\ | * 5a4d063 - Merge branch 'master' into staging <enjoy-digital> | |\ | |/ |/| * | 5984eaa - core: change api for out-of-order. (with_reordering passed to controller and not ports). <Florent Kermarrec> * | 6e10dae - core/bankmachine/write to precharge: indicate that AL=0 <Florent Kermarrec> * | 869c8ee - Merge pull request timvideos#46 from enjoy-digital/WritePrechargeFix <enjoy-digital> |\ \ | * | 0405f41 - Update the write-to-precharge timings so it works with 1:2 <> * | | 30c32f5 - example/litedram_gen: simplify clocking with new S7PLL module, a lot easier :) <Florent Kermarrec> |/ / * | 2a3cacb - core/bankmachine: minor cleanup on trc/tras <Florent Kermarrec> * | 42ccf05 - Merge pull request timvideos#45 from enjoy-digital/tRAS_FIX <enjoy-digital> |\ \ | * | 79b1421 - Auto precharge is too pessimistic, it will wait on its own for a valid time to execute <John Sully> | * | 177d739 - Implement tRAS <John Sully> * | | 5902027 - Merge pull request timvideos#44 from enjoy-digital/tRC_Fix <enjoy-digital> |\ \ \ | |/ / | * | 5f6b857 - This adds support for tRC timing parameters <John Sully> |/ / * | 1777720 - Merge pull request timvideos#42 from enjoy-digital/HalfRateSequentialFix <enjoy-digital> |\ \ | * | 06c8c2a - The actual fix <John Sully> | * | e22580f - remove unnecessary file <John Sully> | * | c028786 - Fix overflow bug from code review <John Sully> | * | 8447d69 - We wait an extra cycle for no reason <John Sully> |/ / | * 04aa04d - Merge pull request timvideos#43 from enjoy-digital/EfficencyFixes <enjoy-digital> | |\ |/ / | * c4bd842 - Fix many bugs <John Sully> | * fa0f3b2 - Use the ready signal for cas_allowed so that arbitrators know not to iterate <John Sully> |/ * c12404e - README: Add ECC <Florent Kermarrec> * 3f4c14b - frontend/ecc: expose incident bits, change clear register name <Florent Kermarrec> * b9aadf1 - frontend/axi: remove write buffer reservation (not needed) <Florent Kermarrec> * liteeth changed from 3d86844 to 40b99ec * 40b99ec - test: use new RemoteClient import <Florent Kermarrec> * c370e9f - phy/model: remove creation/deletion of ethernet tap (now handled by the simulator) <Florent Kermarrec> * litepcie changed from 3e8de2d to a09d225 * a09d225 - test: use new RemoteClient import <Florent Kermarrec> * litesata changed from fb72044 to b78a731 * b78a731 - test: use new RemoteClient import <Florent Kermarrec> * litescope changed from 686db4f to 1634fa3 * 1634fa3 - test: use new RemoteClient import <Florent Kermarrec> * cb27987 - examples/make: look for platform in migen if not present in litex <Florent Kermarrec> * litex changed from v0.1-451-g537b0e90 to v0.1-492-g934a5da5 * 934a5da5 - soc/cores/clock: add expose_drp on S7PLL/S7MMCM <Florent Kermarrec> * 9097573e - Merge pull request timvideos#109 from cr1901/xip-improve <enjoy-digital> |\ | * 0ff6d586 - Distinguish crt0 variants more clearly, update BIOS to use CTR variant (as it has no .data section). <William D. Jones> | * 81060081 - integration/builder: Create EXECUTE_IN_PLACE Makefile variable to complement COPY_TO_MAIN_RAM. <William D. Jones> | * db906190 - integration/builder: Add LiteX define to generated variables (to distinguish MiSoC and LiteX). <William D. Jones> * | 082b0301 - targets: use new clock abstraction on all 7-series targets <Florent Kermarrec> * | 74e74dc0 - soc/cores/clock: different clkin_freq_range for pll and mmcm <Florent Kermarrec> * | 91d8cc2d - soc/cores/clock: different vco_freq_range for pll and mmcm <Florent Kermarrec> * | 6cd95494 - soc/core/clock: allow selecting buffer type (None, BUFG, BUFR). (default = BUFG) <Florent Kermarrec> * | 912ca323 - soc/cores/clock: create specific S7IDELAYCTRL module <Florent Kermarrec> * | baec87f5 - soc/cores/clock: add S7MMCM support <Florent Kermarrec> * | ef405249 - soc/cores/clocks/S7PLL: add speedgrade support, default to -1 (slowest) <Florent Kermarrec> * | 5415b521 - targets/arty: use new clock abstraction module (compile, untested on board) <Florent Kermarrec> * | 63fc3950 - soc/cores: init clock abstraction module <Florent Kermarrec> |/ * 70a32ed8 - sim/verilator: add multithread support (default=1) <Florent Kermarrec> * 7f0d116d - soc_core: use cpu instead of cpu_or_bridge internally (keep retro-compat for now) <Florent Kermarrec> * 22febe95 - boards/targets: uniformize things between targets <Florent Kermarrec> * 01b025aa - soc_core/get_mem_data: add endianness support and use it in builder/initialize_rom to avoid duplication <Florent Kermarrec> * b528a005 - cores/cpu: add software informations to cpu and simplify cpu_interface <Florent Kermarrec> * 2d785cb0 - boards/plarforms: fix issues found while testing simple design on all platforms <Florent Kermarrec> * 0b0e3ac1 - test/test_targets: test simple design with all platforms <Florent Kermarrec> * c88029d3 - soc_core: add uart-stub argument <Florent Kermarrec> * 0d2d3959 - setup.py: add litex_simple exec (to ease building simple design) <Florent Kermarrec> * e04530e0 - test/test_targets: update and reorganize targets <Florent Kermarrec> * e9ed7370 - ease RemoteClient import <Florent Kermarrec> * 346dcf94 - Merge pull request timvideos#108 from xobs/use-csr-accessors <enjoy-digital> |\ | * 6f25a0d8 - csr: use external csr_readl()/csr_writel() if present <Sean Cross> | * 9a252e36 - csr: use readl()/writel() accessors for accessing mmio <Sean Cross> * | 1c1d87f8 - Merge pull request timvideos#106 from cr1901/data-crt0 <Tim Ansell> |\ \ | |/ | * 9d4da737 - libbase/crt0-lm32.S: Add provisions for loading .data from flash. <William D. Jones> |/ * 01ae7d42 - README: add migen/litex clarification <Florent Kermarrec> * 15e584d8 - targets/sim: generate analyzer.csv <Florent Kermarrec> * cde72603 - targets/sim: generate csr.csv <Florent Kermarrec> * f62df502 - targets/sim: add rom-init <Florent Kermarrec> * 1dbf591e - targets/sim: add ram-init param to allow initializing ram from file (faster than tftp) <Florent Kermarrec> * 9893c246 - integration/soc_core: add get_mem_data function to read memory content from file <Florent Kermarrec> * a3eb2e40 - soc/intergration/builder: fix when no sdram <Florent Kermarrec> * 934b08ed - targets/sim: merge in a single class and ease configuration <Florent Kermarrec> * bd42b188 - Merge branch 'master' of http://github.com/enjoy-digital/litex <Florent Kermarrec> * 3e77ae78 - targets: replace MiniSoC with EthernetSoC <Florent Kermarrec> * badd9924 - targets/sim: add EtherboneSoC target (allow accessing wishbone over in simulation with litex_server) <Florent Kermarrec> * migen changed from 0.6.dev-168-gca0df1c to 0.6.dev-172-g56f359d * 56f359d - Added icebreaker platform. (timvideos#135) <Piotr Esden-Tempski> * 88e72a5 - Sayma RTM: expose clock mezzanine gpio as a connector (timvideos#134) <hartytp> * 1d3433e - Revert "Emit `default_nettype none." <Sebastien Bourdeauducq> * 4621abc - sayma rtm: add clock mezzanine GPIO (timvideos#133) <hartytp> Full submodule status -- 5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD) a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD) 58209708e74999c567389fc514c40acfd739d0a6 litedram (remotes/origin/HEAD) 40b99ecc05ee490d77477cba542db6d63333c390 liteeth (remotes/origin/HEAD) a09d225aafbf98b36913e10366f64ccfad3304af litepcie (remotes/origin/HEAD) b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD) 1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD) 0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD) 13d85a1fe360678bebd57c55f1b35988c655ae95 litevideo (remotes/origin/HEAD) 934a5da559a591f92f592dcd3d1bb676218f9796 litex (v0.1-492-g934a5da5) 56f359d6dc5fff01b36796c8667dd4b58c0428c9 migen (0.6.dev-172-g56f359d)

* litedram changed from ea1ac4d to 41a8a24 * 41a8a24 - modules: express tFAW in ns <Florent Kermarrec> * 7062068 - modules: split DDR3 in 2 categories: Chips and SO-DIMMs <Florent Kermarrec> * 0f46dc4 - modules: add DDR3-800 timings for MT41J128M16 and use it on arty example <Florent Kermarrec> * 426ae23 - examples/litedram_gen: add sdram_module_speedgrade parameter <Florent Kermarrec> * 1bc016c - test: add test_examples <Florent Kermarrec> * f7f8169 - test: update downconverter/upconverter <Florent Kermarrec> * 8de1d91 - core: add with_bank paramteter to NativePort (cause issues on adaptation is bank is always exposed) <Florent Kermarrec> * 70516c4 - Merge branch 'master' of https://github.com/enjoy-digital/litedram <> |\ | * 5820970 - frontend/crossbar: fix timvideos#49 <Florent Kermarrec> * | 71f78d9 - Fix reordering controller rejecting all commands <> * | 8f14211 - Account for CWL in write to read timing <> |/ * 5fb8afe - frontend/axi: omit bank in rdata connect <Florent Kermarrec> * 06ca53d - Merge pull request timvideos#48 from enjoy-digital/staging <enjoy-digital> |\ | * 5a4d063 - Merge branch 'master' into staging <enjoy-digital> | |\ | |/ |/| * | 5984eaa - core: change api for out-of-order. (with_reordering passed to controller and not ports). <Florent Kermarrec> * | 6e10dae - core/bankmachine/write to precharge: indicate that AL=0 <Florent Kermarrec> * | 869c8ee - Merge pull request timvideos#46 from enjoy-digital/WritePrechargeFix <enjoy-digital> |\ \ | * | 0405f41 - Update the write-to-precharge timings so it works with 1:2 <> * | | 30c32f5 - example/litedram_gen: simplify clocking with new S7PLL module, a lot easier :) <Florent Kermarrec> |/ / * | 2a3cacb - core/bankmachine: minor cleanup on trc/tras <Florent Kermarrec> * | 42ccf05 - Merge pull request timvideos#45 from enjoy-digital/tRAS_FIX <enjoy-digital> |\ \ | * | 79b1421 - Auto precharge is too pessimistic, it will wait on its own for a valid time to execute <John Sully> | * | 177d739 - Implement tRAS <John Sully> * | | 5902027 - Merge pull request timvideos#44 from enjoy-digital/tRC_Fix <enjoy-digital> |\ \ \ | |/ / | * | 5f6b857 - This adds support for tRC timing parameters <John Sully> |/ / * | 1777720 - Merge pull request timvideos#42 from enjoy-digital/HalfRateSequentialFix <enjoy-digital> |\ \ | * | 06c8c2a - The actual fix <John Sully> | * | e22580f - remove unnecessary file <John Sully> | * | c028786 - Fix overflow bug from code review <John Sully> | * | 8447d69 - We wait an extra cycle for no reason <John Sully> |/ / | * 04aa04d - Merge pull request timvideos#43 from enjoy-digital/EfficencyFixes <enjoy-digital> | |\ |/ / | * c4bd842 - Fix many bugs <John Sully> | * fa0f3b2 - Use the ready signal for cas_allowed so that arbitrators know not to iterate <John Sully> |/ * c12404e - README: Add ECC <Florent Kermarrec> * 3f4c14b - frontend/ecc: expose incident bits, change clear register name <Florent Kermarrec> * b9aadf1 - frontend/axi: remove write buffer reservation (not needed) <Florent Kermarrec> * liteeth changed from 3d86844 to 40b99ec * 40b99ec - test: use new RemoteClient import <Florent Kermarrec> * c370e9f - phy/model: remove creation/deletion of ethernet tap (now handled by the simulator) <Florent Kermarrec> * litepcie changed from 3e8de2d to a09d225 * a09d225 - test: use new RemoteClient import <Florent Kermarrec> * litesata changed from fb72044 to b78a731 * b78a731 - test: use new RemoteClient import <Florent Kermarrec> * litescope changed from 686db4f to 1634fa3 * 1634fa3 - test: use new RemoteClient import <Florent Kermarrec> * cb27987 - examples/make: look for platform in migen if not present in litex <Florent Kermarrec> * litex changed from v0.1-451-g537b0e90 to v0.1-494-g6e327cda * 6e327cda - bios/sdram: rewrite write_leveling (simplify and improve robustness) <Florent Kermarrec> * 975be668 - platforms/genesys2: add eth clock timing constraint <Florent Kermarrec> * 934a5da5 - soc/cores/clock: add expose_drp on S7PLL/S7MMCM <Florent Kermarrec> * 9097573e - Merge pull request timvideos#109 from cr1901/xip-improve <enjoy-digital> |\ | * 0ff6d586 - Distinguish crt0 variants more clearly, update BIOS to use CTR variant (as it has no .data section). <William D. Jones> | * 81060081 - integration/builder: Create EXECUTE_IN_PLACE Makefile variable to complement COPY_TO_MAIN_RAM. <William D. Jones> | * db906190 - integration/builder: Add LiteX define to generated variables (to distinguish MiSoC and LiteX). <William D. Jones> * | 082b0301 - targets: use new clock abstraction on all 7-series targets <Florent Kermarrec> * | 74e74dc0 - soc/cores/clock: different clkin_freq_range for pll and mmcm <Florent Kermarrec> * | 91d8cc2d - soc/cores/clock: different vco_freq_range for pll and mmcm <Florent Kermarrec> * | 6cd95494 - soc/core/clock: allow selecting buffer type (None, BUFG, BUFR). (default = BUFG) <Florent Kermarrec> * | 912ca323 - soc/cores/clock: create specific S7IDELAYCTRL module <Florent Kermarrec> * | baec87f5 - soc/cores/clock: add S7MMCM support <Florent Kermarrec> * | ef405249 - soc/cores/clocks/S7PLL: add speedgrade support, default to -1 (slowest) <Florent Kermarrec> * | 5415b521 - targets/arty: use new clock abstraction module (compile, untested on board) <Florent Kermarrec> * | 63fc3950 - soc/cores: init clock abstraction module <Florent Kermarrec> |/ * 70a32ed8 - sim/verilator: add multithread support (default=1) <Florent Kermarrec> * 7f0d116d - soc_core: use cpu instead of cpu_or_bridge internally (keep retro-compat for now) <Florent Kermarrec> * 22febe95 - boards/targets: uniformize things between targets <Florent Kermarrec> * 01b025aa - soc_core/get_mem_data: add endianness support and use it in builder/initialize_rom to avoid duplication <Florent Kermarrec> * b528a005 - cores/cpu: add software informations to cpu and simplify cpu_interface <Florent Kermarrec> * 2d785cb0 - boards/plarforms: fix issues found while testing simple design on all platforms <Florent Kermarrec> * 0b0e3ac1 - test/test_targets: test simple design with all platforms <Florent Kermarrec> * c88029d3 - soc_core: add uart-stub argument <Florent Kermarrec> * 0d2d3959 - setup.py: add litex_simple exec (to ease building simple design) <Florent Kermarrec> * e04530e0 - test/test_targets: update and reorganize targets <Florent Kermarrec> * e9ed7370 - ease RemoteClient import <Florent Kermarrec> * 346dcf94 - Merge pull request timvideos#108 from xobs/use-csr-accessors <enjoy-digital> |\ | * 6f25a0d8 - csr: use external csr_readl()/csr_writel() if present <Sean Cross> | * 9a252e36 - csr: use readl()/writel() accessors for accessing mmio <Sean Cross> * | 1c1d87f8 - Merge pull request timvideos#106 from cr1901/data-crt0 <Tim Ansell> |\ \ | |/ | * 9d4da737 - libbase/crt0-lm32.S: Add provisions for loading .data from flash. <William D. Jones> |/ * 01ae7d42 - README: add migen/litex clarification <Florent Kermarrec> * 15e584d8 - targets/sim: generate analyzer.csv <Florent Kermarrec> * cde72603 - targets/sim: generate csr.csv <Florent Kermarrec> * f62df502 - targets/sim: add rom-init <Florent Kermarrec> * 1dbf591e - targets/sim: add ram-init param to allow initializing ram from file (faster than tftp) <Florent Kermarrec> * 9893c246 - integration/soc_core: add get_mem_data function to read memory content from file <Florent Kermarrec> * a3eb2e40 - soc/intergration/builder: fix when no sdram <Florent Kermarrec> * 934b08ed - targets/sim: merge in a single class and ease configuration <Florent Kermarrec> * bd42b188 - Merge branch 'master' of http://github.com/enjoy-digital/litex <Florent Kermarrec> * 3e77ae78 - targets: replace MiniSoC with EthernetSoC <Florent Kermarrec> * badd9924 - targets/sim: add EtherboneSoC target (allow accessing wishbone over in simulation with litex_server) <Florent Kermarrec> * migen changed from 0.6.dev-168-gca0df1c to 0.6.dev-172-g56f359d * 56f359d - Added icebreaker platform. (timvideos#135) <Piotr Esden-Tempski> * 88e72a5 - Sayma RTM: expose clock mezzanine gpio as a connector (timvideos#134) <hartytp> * 1d3433e - Revert "Emit `default_nettype none." <Sebastien Bourdeauducq> * 4621abc - sayma rtm: add clock mezzanine GPIO (timvideos#133) <hartytp> Full submodule status -- 5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD) a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD) 41a8a246b65460fd1abe86d39a4107c349ad60e4 litedram (remotes/origin/HEAD) 40b99ecc05ee490d77477cba542db6d63333c390 liteeth (remotes/origin/HEAD) a09d225aafbf98b36913e10366f64ccfad3304af litepcie (remotes/origin/HEAD) b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD) 1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD) 0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD) 13d85a1fe360678bebd57c55f1b35988c655ae95 litevideo (remotes/origin/HEAD) 6e327cda2697d37b23f607a5a7712363dc60857a litex (v0.1-494-g6e327cda) 56f359d6dc5fff01b36796c8667dd4b58c0428c9 migen (0.6.dev-172-g56f359d)

* litedram changed from ea1ac4d to 208f556 * 208f556 - Merge branch 'master' of https://github.com/enjoy-digital/litedram <> |\ | * 41a8a24 - modules: express tFAW in ns <Florent Kermarrec> | * 7062068 - modules: split DDR3 in 2 categories: Chips and SO-DIMMs <Florent Kermarrec> | * 0f46dc4 - modules: add DDR3-800 timings for MT41J128M16 and use it on arty example <Florent Kermarrec> | * 426ae23 - examples/litedram_gen: add sdram_module_speedgrade parameter <Florent Kermarrec> | * 1bc016c - test: add test_examples <Florent Kermarrec> | * f7f8169 - test: update downconverter/upconverter <Florent Kermarrec> | * 8de1d91 - core: add with_bank paramteter to NativePort (cause issues on adaptation is bank is always exposed) <Florent Kermarrec> * | 69eaf84 - Fix DDR2 and below compilation failure <> |/ * 70516c4 - Merge branch 'master' of https://github.com/enjoy-digital/litedram <> |\ | * 5820970 - frontend/crossbar: fix timvideos#49 <Florent Kermarrec> * | 71f78d9 - Fix reordering controller rejecting all commands <> * | 8f14211 - Account for CWL in write to read timing <> |/ * 5fb8afe - frontend/axi: omit bank in rdata connect <Florent Kermarrec> * 06ca53d - Merge pull request timvideos#48 from enjoy-digital/staging <enjoy-digital> |\ | * 5a4d063 - Merge branch 'master' into staging <enjoy-digital> | |\ | |/ |/| * | 5984eaa - core: change api for out-of-order. (with_reordering passed to controller and not ports). <Florent Kermarrec> * | 6e10dae - core/bankmachine/write to precharge: indicate that AL=0 <Florent Kermarrec> * | 869c8ee - Merge pull request timvideos#46 from enjoy-digital/WritePrechargeFix <enjoy-digital> |\ \ | * | 0405f41 - Update the write-to-precharge timings so it works with 1:2 <> * | | 30c32f5 - example/litedram_gen: simplify clocking with new S7PLL module, a lot easier :) <Florent Kermarrec> |/ / * | 2a3cacb - core/bankmachine: minor cleanup on trc/tras <Florent Kermarrec> * | 42ccf05 - Merge pull request timvideos#45 from enjoy-digital/tRAS_FIX <enjoy-digital> |\ \ | * | 79b1421 - Auto precharge is too pessimistic, it will wait on its own for a valid time to execute <John Sully> | * | 177d739 - Implement tRAS <John Sully> * | | 5902027 - Merge pull request timvideos#44 from enjoy-digital/tRC_Fix <enjoy-digital> |\ \ \ | |/ / | * | 5f6b857 - This adds support for tRC timing parameters <John Sully> |/ / * | 1777720 - Merge pull request timvideos#42 from enjoy-digital/HalfRateSequentialFix <enjoy-digital> |\ \ | * | 06c8c2a - The actual fix <John Sully> | * | e22580f - remove unnecessary file <John Sully> | * | c028786 - Fix overflow bug from code review <John Sully> | * | 8447d69 - We wait an extra cycle for no reason <John Sully> |/ / | * 04aa04d - Merge pull request timvideos#43 from enjoy-digital/EfficencyFixes <enjoy-digital> | |\ |/ / | * c4bd842 - Fix many bugs <John Sully> | * fa0f3b2 - Use the ready signal for cas_allowed so that arbitrators know not to iterate <John Sully> |/ * c12404e - README: Add ECC <Florent Kermarrec> * 3f4c14b - frontend/ecc: expose incident bits, change clear register name <Florent Kermarrec> * b9aadf1 - frontend/axi: remove write buffer reservation (not needed) <Florent Kermarrec> * liteeth changed from 3d86844 to 40b99ec * 40b99ec - test: use new RemoteClient import <Florent Kermarrec> * c370e9f - phy/model: remove creation/deletion of ethernet tap (now handled by the simulator) <Florent Kermarrec> * litepcie changed from 3e8de2d to a09d225 * a09d225 - test: use new RemoteClient import <Florent Kermarrec> * litesata changed from fb72044 to b78a731 * b78a731 - test: use new RemoteClient import <Florent Kermarrec> * litescope changed from 686db4f to 1634fa3 * 1634fa3 - test: use new RemoteClient import <Florent Kermarrec> * cb27987 - examples/make: look for platform in migen if not present in litex <Florent Kermarrec> * migen changed from 0.6.dev-168-gca0df1c to 0.6.dev-172-g56f359d * 56f359d - Added icebreaker platform. (timvideos#135) <Piotr Esden-Tempski> * 88e72a5 - Sayma RTM: expose clock mezzanine gpio as a connector (timvideos#134) <hartytp> * 1d3433e - Revert "Emit `default_nettype none." <Sebastien Bourdeauducq> * 4621abc - sayma rtm: add clock mezzanine GPIO (timvideos#133) <hartytp> Full submodule status -- 5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD) a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD) 208f5562d1e3825ddac6e73d14394d3310f2d239 litedram (remotes/origin/HEAD) 40b99ecc05ee490d77477cba542db6d63333c390 liteeth (remotes/origin/HEAD) a09d225aafbf98b36913e10366f64ccfad3304af litepcie (remotes/origin/HEAD) b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD) 1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD) 0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD) 13d85a1fe360678bebd57c55f1b35988c655ae95 litevideo (remotes/origin/HEAD) 6e327cda2697d37b23f607a5a7712363dc60857a litex (v0.1-494-g6e327cda) 56f359d6dc5fff01b36796c8667dd4b58c0428c9 migen (0.6.dev-172-g56f359d)

* litedram changed from ea1ac4d to eddce76 * eddce76 - Adding tCCD for DDR2 modules. <Tim 'mithro' Ansell> * 208f556 - Merge branch 'master' of https://github.com/enjoy-digital/litedram <> |\ | * 41a8a24 - modules: express tFAW in ns <Florent Kermarrec> | * 7062068 - modules: split DDR3 in 2 categories: Chips and SO-DIMMs <Florent Kermarrec> | * 0f46dc4 - modules: add DDR3-800 timings for MT41J128M16 and use it on arty example <Florent Kermarrec> | * 426ae23 - examples/litedram_gen: add sdram_module_speedgrade parameter <Florent Kermarrec> | * 1bc016c - test: add test_examples <Florent Kermarrec> | * f7f8169 - test: update downconverter/upconverter <Florent Kermarrec> | * 8de1d91 - core: add with_bank paramteter to NativePort (cause issues on adaptation is bank is always exposed) <Florent Kermarrec> * | 69eaf84 - Fix DDR2 and below compilation failure <> |/ * 70516c4 - Merge branch 'master' of https://github.com/enjoy-digital/litedram <> |\ | * 5820970 - frontend/crossbar: fix timvideos#49 <Florent Kermarrec> * | 71f78d9 - Fix reordering controller rejecting all commands <> * | 8f14211 - Account for CWL in write to read timing <> |/ * 5fb8afe - frontend/axi: omit bank in rdata connect <Florent Kermarrec> * 06ca53d - Merge pull request timvideos#48 from enjoy-digital/staging <enjoy-digital> |\ | * 5a4d063 - Merge branch 'master' into staging <enjoy-digital> | |\ | |/ |/| * | 5984eaa - core: change api for out-of-order. (with_reordering passed to controller and not ports). <Florent Kermarrec> * | 6e10dae - core/bankmachine/write to precharge: indicate that AL=0 <Florent Kermarrec> * | 869c8ee - Merge pull request timvideos#46 from enjoy-digital/WritePrechargeFix <enjoy-digital> |\ \ | * | 0405f41 - Update the write-to-precharge timings so it works with 1:2 <> * | | 30c32f5 - example/litedram_gen: simplify clocking with new S7PLL module, a lot easier :) <Florent Kermarrec> |/ / * | 2a3cacb - core/bankmachine: minor cleanup on trc/tras <Florent Kermarrec> * | 42ccf05 - Merge pull request timvideos#45 from enjoy-digital/tRAS_FIX <enjoy-digital> |\ \ | * | 79b1421 - Auto precharge is too pessimistic, it will wait on its own for a valid time to execute <John Sully> | * | 177d739 - Implement tRAS <John Sully> * | | 5902027 - Merge pull request timvideos#44 from enjoy-digital/tRC_Fix <enjoy-digital> |\ \ \ | |/ / | * | 5f6b857 - This adds support for tRC timing parameters <John Sully> |/ / * | 1777720 - Merge pull request timvideos#42 from enjoy-digital/HalfRateSequentialFix <enjoy-digital> |\ \ | * | 06c8c2a - The actual fix <John Sully> | * | e22580f - remove unnecessary file <John Sully> | * | c028786 - Fix overflow bug from code review <John Sully> | * | 8447d69 - We wait an extra cycle for no reason <John Sully> |/ / | * 04aa04d - Merge pull request timvideos#43 from enjoy-digital/EfficencyFixes <enjoy-digital> | |\ |/ / | * c4bd842 - Fix many bugs <John Sully> | * fa0f3b2 - Use the ready signal for cas_allowed so that arbitrators know not to iterate <John Sully> |/ * c12404e - README: Add ECC <Florent Kermarrec> * 3f4c14b - frontend/ecc: expose incident bits, change clear register name <Florent Kermarrec> * b9aadf1 - frontend/axi: remove write buffer reservation (not needed) <Florent Kermarrec> * liteeth changed from 3d86844 to 40b99ec * 40b99ec - test: use new RemoteClient import <Florent Kermarrec> * c370e9f - phy/model: remove creation/deletion of ethernet tap (now handled by the simulator) <Florent Kermarrec> * litepcie changed from 3e8de2d to a09d225 * a09d225 - test: use new RemoteClient import <Florent Kermarrec> * litesata changed from fb72044 to b78a731 * b78a731 - test: use new RemoteClient import <Florent Kermarrec> * litescope changed from 686db4f to 1634fa3 * 1634fa3 - test: use new RemoteClient import <Florent Kermarrec> * cb27987 - examples/make: look for platform in migen if not present in litex <Florent Kermarrec> * migen changed from 0.6.dev-168-gca0df1c to 0.6.dev-173-gd3b875b * d3b875b - Fixed on board green led pin number. Added "multi" led. <Piotr Esden-Tempski> * 56f359d - Added icebreaker platform. (timvideos#135) <Piotr Esden-Tempski> * 88e72a5 - Sayma RTM: expose clock mezzanine gpio as a connector (timvideos#134) <hartytp> * 1d3433e - Revert "Emit `default_nettype none." <Sebastien Bourdeauducq> * 4621abc - sayma rtm: add clock mezzanine GPIO (timvideos#133) <hartytp> Full submodule status -- 5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD) a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD) eddce76ee4a5bdb84e09020983aaa273b9cd5342 litedram (heads/master) 40b99ecc05ee490d77477cba542db6d63333c390 liteeth (remotes/origin/HEAD) a09d225aafbf98b36913e10366f64ccfad3304af litepcie (remotes/origin/HEAD) b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD) 1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD) 0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD) 13d85a1fe360678bebd57c55f1b35988c655ae95 litevideo (remotes/origin/HEAD) 6e327cda2697d37b23f607a5a7712363dc60857a litex (v0.1-494-g6e327cda) d3b875b46eee4d34e093e63cd769bdfaae0da3df migen (0.6.dev-173-gd3b875b)

* litedram changed from ea1ac4d to 6c7a804 * 6c7a804 - Adding tCCD for DDR2 modules. <Tim 'mithro' Ansell> * 208f556 - Merge branch 'master' of https://github.com/enjoy-digital/litedram <> |\ | * 41a8a24 - modules: express tFAW in ns <Florent Kermarrec> | * 7062068 - modules: split DDR3 in 2 categories: Chips and SO-DIMMs <Florent Kermarrec> | * 0f46dc4 - modules: add DDR3-800 timings for MT41J128M16 and use it on arty example <Florent Kermarrec> | * 426ae23 - examples/litedram_gen: add sdram_module_speedgrade parameter <Florent Kermarrec> | * 1bc016c - test: add test_examples <Florent Kermarrec> | * f7f8169 - test: update downconverter/upconverter <Florent Kermarrec> | * 8de1d91 - core: add with_bank paramteter to NativePort (cause issues on adaptation is bank is always exposed) <Florent Kermarrec> * | 69eaf84 - Fix DDR2 and below compilation failure <> |/ * 70516c4 - Merge branch 'master' of https://github.com/enjoy-digital/litedram <> |\ | * 5820970 - frontend/crossbar: fix timvideos#49 <Florent Kermarrec> * | 71f78d9 - Fix reordering controller rejecting all commands <> * | 8f14211 - Account for CWL in write to read timing <> |/ * 5fb8afe - frontend/axi: omit bank in rdata connect <Florent Kermarrec> * 06ca53d - Merge pull request timvideos#48 from enjoy-digital/staging <enjoy-digital> |\ | * 5a4d063 - Merge branch 'master' into staging <enjoy-digital> | |\ | |/ |/| * | 5984eaa - core: change api for out-of-order. (with_reordering passed to controller and not ports). <Florent Kermarrec> * | 6e10dae - core/bankmachine/write to precharge: indicate that AL=0 <Florent Kermarrec> * | 869c8ee - Merge pull request timvideos#46 from enjoy-digital/WritePrechargeFix <enjoy-digital> |\ \ | * | 0405f41 - Update the write-to-precharge timings so it works with 1:2 <> * | | 30c32f5 - example/litedram_gen: simplify clocking with new S7PLL module, a lot easier :) <Florent Kermarrec> |/ / * | 2a3cacb - core/bankmachine: minor cleanup on trc/tras <Florent Kermarrec> * | 42ccf05 - Merge pull request timvideos#45 from enjoy-digital/tRAS_FIX <enjoy-digital> |\ \ | * | 79b1421 - Auto precharge is too pessimistic, it will wait on its own for a valid time to execute <John Sully> | * | 177d739 - Implement tRAS <John Sully> * | | 5902027 - Merge pull request timvideos#44 from enjoy-digital/tRC_Fix <enjoy-digital> |\ \ \ | |/ / | * | 5f6b857 - This adds support for tRC timing parameters <John Sully> |/ / * | 1777720 - Merge pull request timvideos#42 from enjoy-digital/HalfRateSequentialFix <enjoy-digital> |\ \ | * | 06c8c2a - The actual fix <John Sully> | * | e22580f - remove unnecessary file <John Sully> | * | c028786 - Fix overflow bug from code review <John Sully> | * | 8447d69 - We wait an extra cycle for no reason <John Sully> |/ / | * 04aa04d - Merge pull request timvideos#43 from enjoy-digital/EfficencyFixes <enjoy-digital> | |\ |/ / | * c4bd842 - Fix many bugs <John Sully> | * fa0f3b2 - Use the ready signal for cas_allowed so that arbitrators know not to iterate <John Sully> |/ * c12404e - README: Add ECC <Florent Kermarrec> * 3f4c14b - frontend/ecc: expose incident bits, change clear register name <Florent Kermarrec> * b9aadf1 - frontend/axi: remove write buffer reservation (not needed) <Florent Kermarrec> * liteeth changed from 3d86844 to 40b99ec * 40b99ec - test: use new RemoteClient import <Florent Kermarrec> * c370e9f - phy/model: remove creation/deletion of ethernet tap (now handled by the simulator) <Florent Kermarrec> * litepcie changed from 3e8de2d to a09d225 * a09d225 - test: use new RemoteClient import <Florent Kermarrec> * litesata changed from fb72044 to b78a731 * b78a731 - test: use new RemoteClient import <Florent Kermarrec> * litescope changed from 686db4f to 1634fa3 * 1634fa3 - test: use new RemoteClient import <Florent Kermarrec> * cb27987 - examples/make: look for platform in migen if not present in litex <Florent Kermarrec> * migen changed from 0.6.dev-168-gca0df1c to 0.6.dev-173-gd3b875b * d3b875b - Fixed on board green led pin number. Added "multi" led. <Piotr Esden-Tempski> * 56f359d - Added icebreaker platform. (timvideos#135) <Piotr Esden-Tempski> * 88e72a5 - Sayma RTM: expose clock mezzanine gpio as a connector (timvideos#134) <hartytp> * 1d3433e - Revert "Emit `default_nettype none." <Sebastien Bourdeauducq> * 4621abc - sayma rtm: add clock mezzanine GPIO (timvideos#133) <hartytp> Full submodule status -- 5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD) a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD) 6c7a804986d8916bdc3d97ba2181c00787a5a91b litedram (heads/master) 40b99ecc05ee490d77477cba542db6d63333c390 liteeth (remotes/origin/HEAD) a09d225aafbf98b36913e10366f64ccfad3304af litepcie (remotes/origin/HEAD) b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD) 1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD) 0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD) 13d85a1fe360678bebd57c55f1b35988c655ae95 litevideo (remotes/origin/HEAD) 6e327cda2697d37b23f607a5a7712363dc60857a litex (v0.1-494-g6e327cda) d3b875b46eee4d34e093e63cd769bdfaae0da3df migen (0.6.dev-173-gd3b875b)

* litedram changed from ea1ac4d to 5b02791 * 5b02791 - modules: add tCCD to all modules <Florent Kermarrec> * 6c7a804 - Adding tCCD for DDR2 modules. <Tim 'mithro' Ansell> * 208f556 - Merge branch 'master' of https://github.com/enjoy-digital/litedram <> |\ | * 41a8a24 - modules: express tFAW in ns <Florent Kermarrec> | * 7062068 - modules: split DDR3 in 2 categories: Chips and SO-DIMMs <Florent Kermarrec> | * 0f46dc4 - modules: add DDR3-800 timings for MT41J128M16 and use it on arty example <Florent Kermarrec> | * 426ae23 - examples/litedram_gen: add sdram_module_speedgrade parameter <Florent Kermarrec> | * 1bc016c - test: add test_examples <Florent Kermarrec> | * f7f8169 - test: update downconverter/upconverter <Florent Kermarrec> | * 8de1d91 - core: add with_bank paramteter to NativePort (cause issues on adaptation is bank is always exposed) <Florent Kermarrec> * | 69eaf84 - Fix DDR2 and below compilation failure <> |/ * 70516c4 - Merge branch 'master' of https://github.com/enjoy-digital/litedram <> |\ | * 5820970 - frontend/crossbar: fix timvideos#49 <Florent Kermarrec> * | 71f78d9 - Fix reordering controller rejecting all commands <> * | 8f14211 - Account for CWL in write to read timing <> |/ * 5fb8afe - frontend/axi: omit bank in rdata connect <Florent Kermarrec> * 06ca53d - Merge pull request timvideos#48 from enjoy-digital/staging <enjoy-digital> |\ | * 5a4d063 - Merge branch 'master' into staging <enjoy-digital> | |\ | |/ |/| * | 5984eaa - core: change api for out-of-order. (with_reordering passed to controller and not ports). <Florent Kermarrec> * | 6e10dae - core/bankmachine/write to precharge: indicate that AL=0 <Florent Kermarrec> * | 869c8ee - Merge pull request timvideos#46 from enjoy-digital/WritePrechargeFix <enjoy-digital> |\ \ | * | 0405f41 - Update the write-to-precharge timings so it works with 1:2 <> * | | 30c32f5 - example/litedram_gen: simplify clocking with new S7PLL module, a lot easier :) <Florent Kermarrec> |/ / * | 2a3cacb - core/bankmachine: minor cleanup on trc/tras <Florent Kermarrec> * | 42ccf05 - Merge pull request timvideos#45 from enjoy-digital/tRAS_FIX <enjoy-digital> |\ \ | * | 79b1421 - Auto precharge is too pessimistic, it will wait on its own for a valid time to execute <John Sully> | * | 177d739 - Implement tRAS <John Sully> * | | 5902027 - Merge pull request timvideos#44 from enjoy-digital/tRC_Fix <enjoy-digital> |\ \ \ | |/ / | * | 5f6b857 - This adds support for tRC timing parameters <John Sully> |/ / * | 1777720 - Merge pull request timvideos#42 from enjoy-digital/HalfRateSequentialFix <enjoy-digital> |\ \ | * | 06c8c2a - The actual fix <John Sully> | * | e22580f - remove unnecessary file <John Sully> | * | c028786 - Fix overflow bug from code review <John Sully> | * | 8447d69 - We wait an extra cycle for no reason <John Sully> |/ / | * 04aa04d - Merge pull request timvideos#43 from enjoy-digital/EfficencyFixes <enjoy-digital> | |\ |/ / | * c4bd842 - Fix many bugs <John Sully> | * fa0f3b2 - Use the ready signal for cas_allowed so that arbitrators know not to iterate <John Sully> |/ * c12404e - README: Add ECC <Florent Kermarrec> * 3f4c14b - frontend/ecc: expose incident bits, change clear register name <Florent Kermarrec> * b9aadf1 - frontend/axi: remove write buffer reservation (not needed) <Florent Kermarrec> * liteeth changed from 3d86844 to 40b99ec * 40b99ec - test: use new RemoteClient import <Florent Kermarrec> * c370e9f - phy/model: remove creation/deletion of ethernet tap (now handled by the simulator) <Florent Kermarrec> * litepcie changed from 3e8de2d to a09d225 * a09d225 - test: use new RemoteClient import <Florent Kermarrec> * litesata changed from fb72044 to b78a731 * b78a731 - test: use new RemoteClient import <Florent Kermarrec> * litescope changed from 686db4f to 1634fa3 * 1634fa3 - test: use new RemoteClient import <Florent Kermarrec> * cb27987 - examples/make: look for platform in migen if not present in litex <Florent Kermarrec> * migen changed from 0.6.dev-168-gca0df1c to 0.6.dev-173-gd3b875b * d3b875b - Fixed on board green led pin number. Added "multi" led. <Piotr Esden-Tempski> * 56f359d - Added icebreaker platform. (timvideos#135) <Piotr Esden-Tempski> * 88e72a5 - Sayma RTM: expose clock mezzanine gpio as a connector (timvideos#134) <hartytp> * 1d3433e - Revert "Emit `default_nettype none." <Sebastien Bourdeauducq> * 4621abc - sayma rtm: add clock mezzanine GPIO (timvideos#133) <hartytp> Full submodule status -- 5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD) a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD) 5b02791580db9d1bae64b6524b7aca3540d89937 litedram (remotes/origin/HEAD) 40b99ecc05ee490d77477cba542db6d63333c390 liteeth (remotes/origin/HEAD) a09d225aafbf98b36913e10366f64ccfad3304af litepcie (remotes/origin/HEAD) b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD) 1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD) 0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD) 13d85a1fe360678bebd57c55f1b35988c655ae95 litevideo (remotes/origin/HEAD) 6e327cda2697d37b23f607a5a7712363dc60857a litex (v0.1-494-g6e327cda) d3b875b46eee4d34e093e63cd769bdfaae0da3df migen (0.6.dev-173-gd3b875b)

* liteeth changed from b1bcfb2 to dbe15f1 * dbe15f1 - Merge pull request timvideos#42 from shuffle2/padding <enjoy-digital> * d66d302 - mac padding: fix counter reset value <Shawn Hoffman> * litepcie changed from 2274b88 to 61c202d * 61c202d - litepcie_gen: allow up to 32 user IRQs with MSI-X. <Florent Kermarrec> * 9e84d6a - litepcie_gen: remove flash_ios. <Florent Kermarrec> * 3f63e74 - core/msi/LitePCIeMSIX: use width in enable/pba CSRs. <Florent Kermarrec> * litesata changed from 2e5c5b1 to b36d3a3 * b36d3a3 - core/examples: update. <Florent Kermarrec> * litescope changed from 0e1ca9e to 15179cb * 15179cb - examples/targets/simple: update. <Florent Kermarrec> * litex changed from 52b51e1e to ad76f5f3 * ad76f5f3 - Merge pull request timvideos#578 from scanakci/blackparrot_litex <enjoy-digital> |\ | * eafceb94 - Merge branch 'master' into blackparrot_litex <enjoy-digital> | |\ | |/ |/| * | 5a1c3a7c - Merge pull request timvideos#579 from antmicro/fix_building_bios <enjoy-digital> |\ \ | * | d72380c8 - Fix ordering of libraries <Mateusz Holenko> | / | * caf520c8 - clean Makefile <sadullah> | * 9256a4db - minor change in BP top module <sadullah> | * 7c83a1b8 - syn with master blackparrot, upgrade BP to IMA <sadullah> |/ * dae23f2a - Merge pull request timvideos#576 from betrusted-io/deprecate_slave <enjoy-digital> |\ | * 0b4c5059 - Deprecate slave terminology <bunnie> * | 1e605fb2 - liblitesdcard/sdcard: update with litesdcard. <Florent Kermarrec> * | 34e9d12e - interconnect/axi/AXIStreamInterface: add tuser support. <Florent Kermarrec> * | 4094a6ec - liblitesdcard/sdcard: increase busy_wait and use common timeout. <Florent Kermarrec> * | e8f84c96 - liblitesdcard/sdcard: decode cid only when SDCARD_DEBUG is set. <Florent Kermarrec> * | c0770312 - liblitesdcard/sdcard_read: enable multiple block read. <Florent Kermarrec> * | 8c572d2b - targets: add fixed sdcard clock on boards with SDCard support. <Florent Kermarrec> * | c4669003 - software/bios/litesdcard: remove sdcard_set_clk. <Florent Kermarrec> * | dfa3768d - integration/soc/add_sdcard: remove sdclk. <Florent Kermarrec> * | 9a27465d - cores/clock/S6DCM: add expose_drp. <Florent Kermarrec> * | d8aa9a42 - software/bios/boot: improve printfs. <Florent Kermarrec> * | 55e01937 - software/libase/memtest: improve printfs and add progress bar on data test. <Florent Kermarrec> * | 49741366 - libbase/progress: reduce to 40 HASHES_PER_LINE. <Florent Kermarrec> * | 52d7f59a - software/liblitedram: remove DDRPHY_CMD_DELAY support (no longer useful). <Florent Kermarrec> * | 07f145fd - software/liblitedram/sdram: remove SRAM hack. <Florent Kermarrec> * | e2f9a825 - software/libbase/memtest: reorder functions. <Florent Kermarrec> |/ * 00d1118d - Merge pull request timvideos#575 from antmicro/jboc/memtest <enjoy-digital> |\ | * 3b084b28 - bios: move memtest from liblitedram to libbase <Jędrzej Boczar> |/ * 3a5aec69 - software/liblitesdcard: simplify, switch to DMAs, remove clocking/test functions. <Florent Kermarrec> * fd4765e1 - integration/soc: replace SDDataReader/SDDataWriter with DMAs. <Florent Kermarrec> * bc64e354 - soc/cores: add simple DMA with WishboneDMAReader/WishboneDMAWriter. <Florent Kermarrec> * d7cc7d2a - platforms/genesys2: add usb_fifo. <Florent Kermarrec> * 309eda42 - litex_term: keep and reduce inter-frame delay to 1e-5. <Florent Kermarrec> * 64589cfd - soc/cores/uart/FT245: only use Asynchronous FIFO (Synchronous FIFO requires a software configuration). <Florent Kermarrec> * 0780b629 - soc/cores/usb_fifo: cleanup and reduce fifo_depth (provide similar throughput when used as UART). <Florent Kermarrec> * litex-boards changed from 936ba5b to efe33c9 * efe33c9 - targets/arty: add fixed sdcard clock and remove sys2x (use NETWORKING interface_type on DDR3). <Florent Kermarrec> * 6753a92 - targets: add fixed sdcard clock on boards with SDCard support. <Florent Kermarrec> * 782c856 - platforms/genesys2: add usb_fifo. <Florent Kermarrec> Full submodule status -- 2942d0652a89646c5225bee15dd55cc3b0871766 VexRiscv (1.0.1-417-g2942d06) 3a6108a75be356a3dc53760d22782f1323248b6b edid-decode (heads/master) 3a06aa84b62ad24467fb0d2c6ceddf565e9ea447 flash_proxies (heads/master) 8c112c709c0eeb3a79d2696e168becb9d1d4d8c8 litedram (2020.04-59-g8c112c7) dbe15f17fcf96b8a4671465a4df93381ca11b818 liteeth (2020.04-19-gdbe15f1) 6fdd02058fba29008c90b162e0ef707dce15ebeb liteiclink (2020.04) 61c202dc82fe7e36c55ccfebea41b37b6e553b68 litepcie (2020.04-40-g61c202d) b36d3a33fbbfcffdb77a7a9e05bc8121387858d3 litesata (2020.04-1-gb36d3a3) 15179cb46f68bff1679631a8bade6f7e1607a40a litescope (2020.04-2-g15179cb) 7457a29b1a47fe15e81fa37f3bbdd510788f1d53 liteusb (heads/master) 41f30143075ece3fff5c33a332ed067d1837cbb3 litevideo (2020.04) ad76f5f3d852efb8d233dabb99245ef0b07b5db8 litex (2020.04-408-gad76f5f3) efe33c9764efc997507cf66da8c706716888a33f litex-boards (2020.04-109-gefe33c9) 77df9bd84d6e85dd5fcb814b17ed6a1e808ad490 litex-renode (remotes/origin/HEAD) b1b2b298b85a795239daad84c75be073ddc4f8bd migen (0.6.dev-347-gb1b2b29) 8f5a253b22cd4ebcd56304a3662f4c70e3b34ed5 nmigen (v0.1-69-g8f5a253)

* litedram changed from de55a8e to 9044c10 * 9044c10 - phy/ecp5ddrphy: use sys_rst instead of sys2x_rst as reset on primitives and do sys2x reset externally. <Florent Kermarrec> * fa7d91a - phy/ecp5: simplify/fix dqs_oe/dq_oe and revert BitSlip on dq_i_data. <Florent Kermarrec> * 8c112c7 - Merge pull request #207 from ozbenh/sim-autoinit <enjoy-digital> |\ | * 4580882 - dfii: Really default to HW control <Benjamin Herrenschmidt> |/ * 52d7dbe - frontend/fifo: make sure FIFO is only used on LiteDRAMNativePort, expose writer/reader fifo depth, add separators and update copyrights. <Florent Kermarrec> * c4c8803 - Merge pull request #204 from antmicro/jboc/spd-read <enjoy-digital> |\ | * 863c45a - test/spd_data: add missing files to tracking <Jędrzej Boczar> | * cbd9087 - modules/spd: select tFAW_min_ck depending on page size <Jędrzej Boczar> | * a8f2c04 - modules: add DDR4SPDData parser <Jędrzej Boczar> * | 067e8a5 - Merge pull request #205 from antmicro/jboc/fifo <enjoy-digital> |\ \ | * | e5179eb - gen: fix LiteDRAMFIFO parameters <Jędrzej Boczar> | * | 8fedc3f - frontend/fifo: increase FIFO level after data has actually been written <Jędrzej Boczar> |/ / * | 992f80c - litedram_gen: add Ultrascale(+) support and KCU105 config file, remove cmd_delay on 7-series (not automatically calibrated). <Florent Kermarrec> * | 361d250 - litedram_gen: avoid second S7PLL for iodelay clk, generate it from main S7PLL on CLKOUT0 (with fractional divide). <Florent Kermarrec> * | 1b56dcf - litedram_gen: add more memtype asserts, remove csr_alignment (now fixed to 32-bit). <Florent Kermarrec> * | a595fe0 - dfii: simplify control using CSRFields. <Florent Kermarrec> * | 899462c - Merge pull request #202 from ozbenh/sim-autoinit <enjoy-digital> |\ \ | * | f3f89ed - Default to HW control for sim <Benjamin Herrenschmidt> * | | d62fd24 - Merge pull request #201 from antmicro/jboc/spd-read <enjoy-digital> |\ \ \ | |/ / |/| / | |/ | * 4233f86 - modules/spd: save SPD data in SDRAMModule to allow for runtime verification <Jędrzej Boczar> * | f23cb80 - litedram_gen: revert builder.build(..., regular_comb=False). <Florent Kermarrec> * | d1db115 - litedram_gen: review/simplify #197. <Florent Kermarrec> * | a8e281f - Merge pull request #197 from ozbenh/standalone-sim <enjoy-digital> |\ \ | * | d0f0c94 - phy/model: Don't generate empty mem_*.init files <Benjamin Herrenschmidt> | * | b8d6da5 - gen: Allow generation of a standalone sim model <Benjamin Herrenschmidt> * | | 83b9a1d - Merge pull request #199 from antmicro/jboc/spd-read <enjoy-digital> |\ \ \ | |/ / |/| / | |/ | * cbe91bc - modules: add function for parsing SPD EEPROM dumps from BIOS firmware <Jędrzej Boczar> * | 639a31f - test/test_timing: update test_txxd_controller. <Florent Kermarrec> * | 3c1ab76 - litedram/common/tXXDController: only set reset to 1 when txxd is None. <Florent Kermarrec> |/ * e95af3f - Merge pull request #195 from enjoy-digital/bios-libs <enjoy-digital> |\ | * fe48a92 - test/reference: update. <Florent Kermarrec> | * c30910a - init: generate DFII_CONTROL flags in sdram_phy.h instead of defining them in the BIOS. <Florent Kermarrec> |/ * 5078b19 - core/crossbar: remove retro-compat > 6 months old. <Florent Kermarrec> * 3b105d5 - modules: fix SDRAMRegisteredModule. <Florent Kermarrec> * b2a5685 - Merge pull request #189 from daveshah1/ddr4_rdimm_init <enjoy-digital> |\ | * 70054ba - Add support for DDR4 RDIMMs <David Shah> * | 7ae4ad5 - modules: add SDR/DDR/DDR2/DDR3/DDR4 SDRAMModule (and Registered versions). <Florent Kermarrec> * | 1f7d9eb - litedram_gen: pass FPGA speedgrade to iodelay_pll. <Florent Kermarrec> * | f4871b9 - litedram_gen: use default settings on wb_bus. <Florent Kermarrec> * | 6fb8396 - litedram_gen: remove csr_base (no longer needed since CPUNone type will automatically set csr mapping to 0x00000000) and create a use bus with the same address_width as the main bus of the SoC. <Florent Kermarrec> * | 94c215e - litedram_gen: review/simplify #193, always add ddrctrl. <Florent Kermarrec> * | f036ec2 - Merge pull request #193 from ozbenh/standalone-cores <enjoy-digital> |\ \ | * | 04717b4 - gen: Rename standalone core wishbone <Benjamin Herrenschmidt> | * | b0838f7 - gen: Add option to specify CSR alignment <Benjamin Herrenschmidt> | * | d5a03b3 - gen: Add option to generate DDRCTL on standalone cores <Benjamin Herrenschmidt> | * | efad6b3 - gen: Add option to specify CSR base for standalone cores <Benjamin Herrenschmidt> | * | c91cbb5 - gen: Remove obsolete bus_expose config option <Benjamin Herrenschmidt> |/ / * | 4e539ad - litedram_gen: switch to SoCCore. <Florent Kermarrec> * | ac33d29 - litedram_gen: simplify and expose bus when CPU is set to None. <Florent Kermarrec> * | fe47838 - litedram_gen: expose a Bus Slave port instead of a CSR port. <Florent Kermarrec> * | 52b49fb - test/reference: update. <Florent Kermarrec> * | 52ca393 - modules: add MT41J512M16/MT41K512M16. <Florent Kermarrec> * | 589957f - phy: extend Bitslip capability to 2 sys_clk cycles. <Florent Kermarrec> * | 5c0231d - common/BitSlip: add cycles parameter to extend bitstlip to multiple system clock cycles. <Florent Kermarrec> * | ed0810a - gen: Optionally pass cpu_variant from YAML to SoC <Benjamin Herrenschmidt> |/ * dfe6f90 - Merge pull request #188 from daveshah1/ddr4_dimm_x4 <enjoy-digital> |\ | * 5b4381b - usddrphy: Support for x4 chip based DIMMs <David Shah> * | 9f136c0 - Merge pull request #187 from daveshah1/add_MTA18ASF2G72PZ <enjoy-digital> |\ \ | |/ |/| | * 97f0a37 - modules: Add MTA18ASF2G72PZ DDR4 RDIMM <David Shah> |/ * 9a2d3f0 - common: add PHYPadsReducer to only use specific DRAM modules. <Florent Kermarrec> * 20a849c - test/reference: update ddr4_init.h <Florent Kermarrec> * cec3a99 - Merge pull request #181 from antmicro/jboc/eeprom-timings <enjoy-digital> |\ | * 312bce2 - modules: pass rate automatically when creating module from SPD data <Jędrzej Boczar> | * 07bbd79 - modules: update existsing SO-DIMM timings based on SPD data <Jędrzej Boczar> | * cf83ac6 - test: improve SPD tests of Micron DDR3 SO-DIMM modules <Jędrzej Boczar> | * 854a614 - modules: fix calculations of speedgrade from tck in SPD data <Jędrzej Boczar> | * c744204 - modules: fix nrows in MT8KTF51264 <Jędrzej Boczar> | * 3980e06 - modules: add option to load module parameters from SPD data <Jędrzej Boczar> * | 48c2fc2 - phy: simplify/improve dqs preamble/postamble. <Florent Kermarrec> * | eaf0691 - phy/ecp5ddrphy: simplify, working with dqs preamble/postamble. <Florent Kermarrec> * | 12a017f - phy/ecp5ddrphy: simplify/cleanup. <Florent Kermarrec> * | 62915cd - phy: rework BitSlip to simplify integration, add DQSPattern module. <Florent Kermarrec> * | 9ff9e82 - phy/usddrphy: move pads.ten control to control block. <Florent Kermarrec> * | 91a9a2a - phy/ecp5ddrphy: fix dqs preamble/postamble control. (make it similar to 7-series/Ultrascale). <Florent Kermarrec> * | 5d29686 - phy/s7ddrphy/usddrphy: more compact write dqs postamble/preamble control path. <Florent Kermarrec> * | 8d0e7f6 - phy/usddrphy: simplify/cleanup write control path/dqs postamble/preamble control path. <Florent Kermarrec> * | 57b16c2 - phy/usddrphy: simplify/cleanup write control path, add DQS Pre/Postamble support. <Florent Kermarrec> * | 1462a43 - phy/usddrphy: cleanup/simplify read control path. <Florent Kermarrec> * | cd671f9 - phy/s7ddrphy: cleanup/simplify read control path. <Florent Kermarrec> * | d061e60 - test/reference: update. <Florent Kermarrec> * | 45a03df - phy/init: add phytype to PhySettings and export more parameters to C header to simplify software. <Florent Kermarrec> * | 2df9004 - init: improve ident. <Florent Kermarrec> * | eca7fc2 - phy/ecp5ddrphy: remove Bitslip from comment (no longer present). <Florent Kermarrec> * | f4f2948 - phy/ecpddrphy: remove Bitslip (not used and redundant with dqs_read) and use BitSlip software control to move dqs_read. <Florent Kermarrec> * | e2b4c2b - phy/ecp5ddrphy: cosmetics. <Florent Kermarrec> |/ * f68f1dd - phy/ecp5ddrphy/control: cleanup/simplify and document (no functional changes). <Florent Kermarrec> * fdf7c76 - phy/control: cleanup/simplify (no functional changes). <Florent Kermarrec> * a767618 - phy: improve flow control readability (add separators between Read/Write/Write DQS Postamble/Preamble parts). <Florent Kermarrec> * liteeth changed from 705003e to dbe15f1 * dbe15f1 - Merge pull request #42 from shuffle2/padding <enjoy-digital> |\ | * d66d302 - mac padding: fix counter reset value <Shawn Hoffman> |/ * b1bcfb2 - mac/LiteEthMACCoreCrossbar: remove unnecessary fifos. <Florent Kermarrec> * 8e11857 - common: remove Port.connect and use 2 separate Record.connect. <Florent Kermarrec> * 17caf17 - mac/LiteEthMACCoreCrossbar: remove cpu_dw. <Florent Kermarrec> * 23b420a - mac/LiteEthMAC: simplify hybrid mode and avoid some duplication. <Florent Kermarrec> * 51cd546 - core/mac: add missing separators, fix typos. <Florent Kermarrec> * 59d3336 - mac: add separators, improve indent, minor simplifications. <Florent Kermarrec> * d06c7b4 - frontend: add separators, improve indent, minor simplifications. <Florent Kermarrec> * 2d58f48 - core: improve indent. <Florent Kermarrec> * c262818 - core: add separators. <Florent Kermarrec> * bb29706 - core: remove mac retro-compatibility (>6 months old). <Florent Kermarrec> * 0feed17 - phy/gmii/CRG: add BUFG on RX and do the TX clock Mux with combinatorial logic (from @skiphansen initial work). <Florent Kermarrec> * 53c9eb9 - core/ip: move mcase_oui/ip_mask definition to common and set target_mac with NextValue. <Florent Kermarrec> * 58e1681 - Merge pull request #41 from shuffle2/mcast <enjoy-digital> |\ | * 6d00ec1 - iptx: support multicast mac and bypass arp table <Shawn Hoffman> * | 8afdec9 - phy/ecp5rgmii: review/simplify inband_status integration. <Florent Kermarrec> * | 55af430 - Merge pull request #40 from shuffle2/master <enjoy-digital> |\ \ | |/ |/| | * 26c4e41 - ecp5rgmii: enable reading inband PHY_status <Shawn Hoffman> |/ * dc67e6d - phy/ecp5rgmii: use DDROutput/DDRInput now available for ECP5. <Florent Kermarrec> * litepcie changed from 586ef78 to 61c202d * 61c202d - litepcie_gen: allow up to 32 user IRQs with MSI-X. <Florent Kermarrec> * 9e84d6a - litepcie_gen: remove flash_ios. <Florent Kermarrec> * 3f63e74 - core/msi/LitePCIeMSIX: use width in enable/pba CSRs. <Florent Kermarrec> * 2274b88 - litepcie_gen: expose stream's first on AXI interface as tuser. <Florent Kermarrec> * 3271597 - Merge pull request #32 from sergachev/master <enjoy-digital> |\ | * 9c5d250 - example: fix phy type <Ilia Sergachev> |/ * 761f8fb - example: uniformize kc705/kcu105 examples. <Florent Kermarrec> * c84605e - litepcie_gen: add Ultrascale support and example on kcu105.yml. <Florent Kermarrec> * b73b72e - examples/kcu105: cleanup, use 4 lanes. <Florent Kermarrec> * 597ab2d - README: add MSI/MSI-X support. <Florent Kermarrec> * 150b34e - core/msi: test and fix LitePCIeMSIX, add register on S7PCIEPHY to get MSI-X enable status. <Florent Kermarrec> * 4f8c624 - test/test_examples: update. <Florent Kermarrec> * 84c9d71 - core/msi: add initial MSI-X implementation (untested). <Florent Kermarrec> * 3ef2ae7 - software/kernel/main: add MSI Multi-Vector minimal support. <Florent Kermarrec> * bd375da - litepcie_gen: use generate_litepcie_software_headers. <Florent Kermarrec> * bf4b23c - software/generate_litepcie_software_header: add kernel to dst in generate_litepcie_software. <Florent Kermarrec> * 3a7a76b - examples: use generate_litepcie_software. <Florent Kermarrec> * ad93d52 - software: add generate_litepcie_software_headers/software functions to avoid duplication in targets. <Florent Kermarrec> * 8534965 - litepcie/software: add copy_litepcie_software function (to easily get litepcie software from targets). <Florent Kermarrec> * 5533144 - Merge pull request #30 from enjoy-digital/new_driver <enjoy-digital> |\ | * 2703b8a - merge master. <Florent Kermarrec> | |\ | |/ |/| * | b0e8383 - frontend/dma/LitePCIeDMAReader: immediately return to IDLE state when disabled. <Florent Kermarrec> * | 4e333cb - Merge pull request #29 from sergachev/master <enjoy-digital> |\ \ | * | 8192494 - kernel: remove unnecessary call to pci_release_regions() on device remove <Ilia Sergachev> |/ / * | c2fd143 - phy/s7pciephy: expose disable_constraints parameter to use_external_hard_ip. <Florent Kermarrec> | * 2658ce0 - software/kernel: replace remaining printk with pr_debug or dev_info and use dev_err instead of pr_err when possible. <Florent Kermarrec> | * a78a248 - software/kernel: replace printk(KERN_INFO with pr_debug for debug messages. <Florent Kermarrec> | * 79e448e - software/kernel: replace printk(KERN_ERR with pr_err. <Florent Kermarrec> | * 23f7045 - software: add #ifdef for optional peripheral support. <Florent Kermarrec> | * 1cae8cf - examples: update and more similarities with the integration in litex-boards. <Florent Kermarrec> | * 485a6c4 - software: import new driver. <Florent Kermarrec> | * c4c8705 - software: remove current driver. <Florent Kermarrec> |/ * 6049a69 - litepcie_gen: add optional Sphinx/Html doc generation with --doc. <Florent Kermarrec> * 6bb89af - phy/s7pciehy: disable constraints generated from the .xci and use our owns. <Florent Kermarrec> * ef7d40e - Merge pull request #28 from sergachev/master <enjoy-digital> |\ | * 3eb2b86 - test_dma: remove unused imports and variables, fix mistypes <Ilia Sergachev> |/ * 9a3ada5 - Merge pull request #27 from sergachev/master <enjoy-digital> |\ | * e637090 - dma: fix another couple of mistypes <Ilia Sergachev> | * 4c4e3bf - dma: fix mistypes in comments <Ilia Sergachev> |/ * 3ca6e38 - frontend/dma/monitor: reduce count_width from 32-bit (default) to 16-bit. <Florent Kermarrec> * 22faa07 - litepcie_gen: add pcie_data_width support. <Florent Kermarrec> * 96a6cdc - Merge pull request #25 from sergachev/master <enjoy-digital> |\ | * 5804b43 - software: fix definitions <Ilia Sergachev> * 0496daf - litepcie_gen: add buffers on DMA sink/source to ensure data are clocked on LitePCIe interface and ease integration. <Florent Kermarrec> * 7818ace - frontend/dma: fix level CSRStatus size (+1). <Florent Kermarrec> * a85b1d7 - tlp/controller: expose cmp_bufs_buffered parameter. <Florent Kermarrec> * 264d7f3 - frontend/dma: allow asymetric writer/reader buffering depths. <Florent Kermarrec> * 9cb938e - frontend/dma: expose table_depth parameter. <Florent Kermarrec> * a6d836e - gen/examples: add software reset. <Florent Kermarrec> * litesata changed from 2e5c5b1 to b36d3a3 * b36d3a3 - core/examples: update. <Florent Kermarrec> * litescope changed from 54488c0 to 15179cb * 15179cb - examples/targets/simple: update. <Florent Kermarrec> * 0e1ca9e - examples/make: update. <Florent Kermarrec> * litex changed from 2d018826 to 54598ed2 * 54598ed2 - software/bios/Makefile: fix #578 merge. (get back #579). <Florent Kermarrec> * 7beffba1 - software/libbase/memtest: fix bus errors reporting. <Florent Kermarrec> * ad76f5f3 - Merge pull request #578 from scanakci/blackparrot_litex <enjoy-digital> |\ | * eafceb94 - Merge branch 'master' into blackparrot_litex <enjoy-digital> | |\ | |/ |/| * | 5a1c3a7c - Merge pull request #579 from antmicro/fix_building_bios <enjoy-digital> |\ \ | * | d72380c8 - Fix ordering of libraries <Mateusz Holenko> | | * caf520c8 - clean Makefile <sadullah> | | * 9256a4db - minor change in BP top module <sadullah> | | * 7c83a1b8 - syn with master blackparrot, upgrade BP to IMA <sadullah> | |/ |/| * | dae23f2a - Merge pull request #576 from betrusted-io/deprecate_slave <enjoy-digital> |\ \ | * | 0b4c5059 - Deprecate slave terminology <bunnie> * | | 1e605fb2 - liblitesdcard/sdcard: update with litesdcard. <Florent Kermarrec> * | | 34e9d12e - interconnect/axi/AXIStreamInterface: add tuser support. <Florent Kermarrec> * | | 4094a6ec - liblitesdcard/sdcard: increase busy_wait and use common timeout. <Florent Kermarrec> * | | e8f84c96 - liblitesdcard/sdcard: decode cid only when SDCARD_DEBUG is set. <Florent Kermarrec> * | | c0770312 - liblitesdcard/sdcard_read: enable multiple block read. <Florent Kermarrec> * | | 8c572d2b - targets: add fixed sdcard clock on boards with SDCard support. <Florent Kermarrec> * | | c4669003 - software/bios/litesdcard: remove sdcard_set_clk. <Florent Kermarrec> * | | dfa3768d - integration/soc/add_sdcard: remove sdclk. <Florent Kermarrec> * | | 9a27465d - cores/clock/S6DCM: add expose_drp. <Florent Kermarrec> * | | d8aa9a42 - software/bios/boot: improve printfs. <Florent Kermarrec> * | | 55e01937 - software/libase/memtest: improve printfs and add progress bar on data test. <Florent Kermarrec> * | | 49741366 - libbase/progress: reduce to 40 HASHES_PER_LINE. <Florent Kermarrec> * | | 52d7f59a - software/liblitedram: remove DDRPHY_CMD_DELAY support (no longer useful). <Florent Kermarrec> * | | 07f145fd - software/liblitedram/sdram: remove SRAM hack. <Florent Kermarrec> * | | e2f9a825 - software/libbase/memtest: reorder functions. <Florent Kermarrec> |/ / * | 00d1118d - Merge pull request #575 from antmicro/jboc/memtest <enjoy-digital> |\ \ | * | 3b084b28 - bios: move memtest from liblitedram to libbase <Jędrzej Boczar> |/ / * | 3a5aec69 - software/liblitesdcard: simplify, switch to DMAs, remove clocking/test functions. <Florent Kermarrec> * | fd4765e1 - integration/soc: replace SDDataReader/SDDataWriter with DMAs. <Florent Kermarrec> * | bc64e354 - soc/cores: add simple DMA with WishboneDMAReader/WishboneDMAWriter. <Florent Kermarrec> * | d7cc7d2a - platforms/genesys2: add usb_fifo. <Florent Kermarrec> * | 309eda42 - litex_term: keep and reduce inter-frame delay to 1e-5. <Florent Kermarrec> * | 64589cfd - soc/cores/uart/FT245: only use Asynchronous FIFO (Synchronous FIFO requires a software configuration). <Florent Kermarrec> * | 0780b629 - soc/cores/usb_fifo: cleanup and reduce fifo_depth (provide similar throughput when used as UART). <Florent Kermarrec> |/ * 52b51e1e - CHANGES: update. <Florent Kermarrec> * d59cec5a - software: use a single crt0 (deprecate crt0-ctr/crt0-xip) and avoid unnecessary defines. <Florent Kermarrec> * 384646c6 - platforms/genesys2: use openocd_genesys2.cfg. <Florent Kermarrec> * e92efc1a - platforms/kcu105: add sdcard/spisdcard. <Florent Kermarrec> * 35b04658 - genesys2: add sdcard/spisdcard. <Florent Kermarrec> * d53a51c5 - platforms/netv2: add spisdcard. <Florent Kermarrec> * c8955864 - platforms/k705: rename mmc to sdcard and make it similar to other boards. <Florent Kermarrec> * 02908c51 - cpu/lm32: fix config include paths. <Florent Kermarrec> * b1fe3140 - bios/main: enable sdcardboot in boot_sequence with litesdcard. <Florent Kermarrec> * 847a5fcf - software/liblitesdcard/sdcard: boot with FatFs working (hacky). <Florent Kermarrec> * 5b2f9c24 - cores/cpu/microwatt: revert setup stack and fix missing subi %r1,%r1,0x100 (thanks ozbenh). <Florent Kermarrec> * 0c0689f4 - wishbone/DownConverter: fix read datapath when access is skipped because sel = 0. <Florent Kermarrec> * 84617b58 - cores/cpu/microwatt: temporary revert crt0.S/setup stack. <Florent Kermarrec> * e32e8c06 - Merge pull request #573 from ozbenh/bios-data <enjoy-digital> |\ | * 28ea4b3f - software/microwatt: Fix copying data to RAM and clearing BSS <Benjamin Herrenschmidt> |/ * 13e0852a - tools/litex_server: set socket option flags separately (required for Mac OS X). <Florent Kermarrec> * efa41fd6 - litex_sim: simplify a bit ethernet+etherbone. <Florent Kermarrec> * b0b37b4c - soc/cores/spi: make cs/loopback CSR optional. <Florent Kermarrec> * 05cb5f96 - bios/boot: rewrite ROM boot description. <Florent Kermarrec> * bdcccb92 - Merge pull request #569 from gsomlo/gls-mor1kx-data-init <enjoy-digital> |\ | * e96cfbbc - cpu/mor1kx: fix .data initialization (follow-up to PR #567) <Gabriel Somlo> * | 4cab38fa - Merge pull request #570 from gsomlo/gls-sdcard-lazy-init <enjoy-digital> |\ \ | |/ |/| | * 9ad45a69 - liblitesdcard/[spi]sdcard: avoid redundant (re-)initialization <Gabriel Somlo> |/ * aa0cd213 - Merge pull request #565 from gsomlo/gls-cosmetic-spi-fat <enjoy-digital> |\ | * 5d9d99c0 - liblitesdcard/sdcard: streamline initialization (cosmetic) <Gabriel Somlo> | * c05d0f19 - liblitesdcard/spisdcard: streamline initialization (cosmetic). <Gabriel Somlo> | * 7d5ca3f9 - bios/boot: addresses should use 'unsigned long' <Gabriel Somlo> * | 05d4756e - Merge pull request #567 from zyp/fix_data_segment <enjoy-digital> |\ \ | * | 27fcddb2 - soc_core: Increase sram size default to 8k. <Vegard Storheil Eriksen> | * | 9c68d715 - bios/linker: Place .data in sram with initial copy in rom. <Vegard Storheil Eriksen> | * | 33689660 - bios/linker: Place .got in .rodata. <Vegard Storheil Eriksen> | |/ * | b0f76112 - platforms/arty: move sdcard_pmod_io to JD. <Florent Kermarrec> * | c3ed8025 - Merge pull request #568 from sergachev/master <enjoy-digital> |\ \ | |/ |/| | * 3610b066 - build/sim/core/modules: fix compilation warnings <Ilia Sergachev> |/ * 68d3804c - CHANGES: update. <Florent Kermarrec> * 5ddf350c - software/spisdcard: reduce SPISDCARD_CLK_FREQ to 16MHz. <Florent Kermarrec> * d6f92d1f - build: add DFUProg. <Florent Kermarrec> * 653edd17 - bios/boot: simplify flashboot (remove specific linux boot). <Florent Kermarrec> * 7b65a93c - bios/boot: add separators, update copyrights. <Florent Kermarrec> * f4abdd3f - bios/boot: make Ethernet boot mode flexible (now also using boot.json similarly to SDCard boot). <Florent Kermarrec> * c2ae22ee - bios/boot: make SDCard boot more flexible using a boot.json file on the SDCard. <Florent Kermarrec> * d918c0bb - software/bios/boot/sdcardboot: let FatFs do the SDCard initialization with disk_initialize. <Florent Kermarrec> * 51976008 - software/bios/boot: add sdcardboot support for VexRiscv SMP. <Florent Kermarrec> * 72026d44 - software/bios/main: clarify address space with @ instead of -. <Florent Kermarrec> * a01d08e5 - litex_setup.py: update microwatt. <Florent Kermarrec> * a086237a - Merge pull request #564 from shenki/microwatt-updates <enjoy-digital> |\ | * 748dcc1c - microwatt: Add mmu.vhdl <Joel Stanley> | * b57fc870 - microwatt: Update IRQ signal in wrapper <Joel Stanley> | * 68d2aa45 - microwatt: Add icache flush <Joel Stanley> | * e6909e29 - microwatt: Implement boot helper <Joel Stanley> * | ace81c83 - Merge pull request #562 from gsomlo/gls-crlf <enjoy-digital> |\ \ | * | 5575a921 - liblitesdcard: maintain unix newline convention across all source files <Gabriel Somlo> | |/ * | 08bef5fc - software/liblitesdcard/ffconf: enable FF_FS_MINIMIZE and FF_FS_TINY. <Florent Kermarrec> * | 75225e5e - software/bios/boot: move f_mount to copy_image_from_sdcard_to_ram and force mount. <Florent Kermarrec> * | 59a048b6 - software/libliteeth/tftp: switch to progress bar. <Florent Kermarrec> * | f7e06a7e - bios/boot/copy_image_from_flash_to_ram: add missing init_progression_bar. <Florent Kermarrec> * | df9146fb - soc/spisdcard: use 32-bit SPIMaster and do 32-bit xfers in spisdcardreceive_block to optimize speed. <Florent Kermarrec> * | d45cfc1e - software/libbase/progress: avoid \t in progress bar, reduce HASHES_PER_LINE. <Florent Kermarrec> * | 5beba178 - software/libsdcard/spisdcard: add and use busy_wait_us to optimize speed. <Florent Kermarrec> * | dae15511 - bios/boot/copy_image_from_sdcard_to_ram: use chunks of 32KB to increase speed. <Florent Kermarrec> * | d294e0f1 - bios/boot: add progress bar to copy_image_from_flash_to_ram, use uint32_t in flash/sdcard functions. <Florent Kermarrec> * | 99f40fec - libase/progress: move __div64_32, do_div to div64.h/c as it was in Barebox. <Florent Kermarrec> * | 96fc96ec - software/liblitesdcard: remove read_block prototype, minor cleanup. <Florent Kermarrec> |/ * fe9b42fa - bios/boot: use progress bar in copy_image_from_sdcard_to_ram. <Florent Kermarrec> * 21b9239d - libbase: add progress bar (from Barebox). <Florent Kermarrec> * 32ebbc77 - software/liblitesdcard: add retries when setting card to Idle. <Florent Kermarrec> * 04d0ba61 - software/liblitesdcard/sdcard: add FatFs disk functions. <Florent Kermarrec> * e27ed657 - software/liblitesdcard/spisdcard: rename #defines and allow external definition. <Florent Kermarrec> * a9e8860e - software/liblitesdcard: create fat directory for FatFs files. <Florent Kermarrec> * f1aba7e4 - sofware/liblitesdcard: enable Long Filename (LFN). <Florent Kermarrec> * fb282d1a - software/libsdcard: rewrite/simplify SPISDCard/FatFs support and only keep SDCard ver2.00+ compatibility. <Florent Kermarrec> * 20ff2462 - Merge pull request #559 from gsomlo/gls-fix-crlf <enjoy-digital> |\ | * 78e3f251 - liblitesdcard: convert all sources to unix style newlines (cosmetic) <Gabriel Somlo> |/ * c1806eba - software/liblitesdcard: remove unsused functions with FF_FS_READONLY. <Florent Kermarrec> * f9b43c81 - software/liblitesdcard: switch to FatFs for sdcardboot. <Florent Kermarrec> * f972c8e4 - software/liblitesdcard: base it on FatFs generic example code + LiteX's SPIMaster specific functions. <Florent Kermarrec> * 5b908983 - software/liblitesdcard: add FatFs files. <Florent Kermarrec> * 7d141258 - software/liblitesdcard/spisdcard: simplify/rewrite for consistency with the others parts of the project. - Improve code readability, remove un-needed or duplicate comments. - Only use a spi_xfer function for both write/read. - Set the SDCard to low clk freq before init and increase it when initialized. <Florent Kermarrec> * 860ac1e2 - software/liblitesdcard: add copyrights to spisdcard/fat16. <Florent Kermarrec> * 0ec50881 - software/liblitesdcard/sdcard: simplify readSector. <Florent Kermarrec> * 8c6f74d4 - software/liblitesdcard: fat16 boot working with both SPI and SD modes. <Florent Kermarrec> * bdaf6ff2 - software/liblitesdcard: move fat16 code to separate file to avoid duplication. <Florent Kermarrec> * 4b3c5203 - software/bios/libsdcard: add initial boot from sdcard with litescard, rename spisdcardboot command to sdcardboot. <Florent Kermarrec> * b30e3353 - soc/add_sdcard: use SDClockerS7 for 7-Series and SDClockerGen for others devices. <Florent Kermarrec> * efbe1690 - Merge pull request #558 from antmicro/fix-function-names-liblitespi <enjoy-digital> |\ | * eceee7e4 - litex/soc/software/liblitespi: fix names associated with PHY CSRs <Jan Kowalewski> |/ * fb4b6c35 - boards/ulx3s: add sdcard pins and initial LiteSDCard integration. <Florent Kermarrec> * 997a17b9 - soc/add_sdcard: add minimal SDClockerECP5 on ECP5. <Florent Kermarrec> * 9a026c09 - soc/add_sdcard: remove limitation to 7-Series but only add clocker for it. <Florent Kermarrec> * c311f98c - soc/add_sdcard: emulator clocking moved to litesdcard. <Florent Kermarrec> * 382f239e - software/libsdcard: keep SDCARD_DEBUG enabled for now, fix typos. <Florent Kermarrec> * 20bbdaaf - soc/add_sdcard: remove Timer (unused). <Florent Kermarrec> * ab447df9 - software/liblitesdcard: review/simplify (code is over-complicated, revert part of the old code and write a minimal test for now). <Florent Kermarrec> * ee4056cf - software/liblitesdcard: remove sdtimer functions (unused). <Florent Kermarrec> * ecfa44e5 - Merge pull request #556 from antmicro/mglb/symbiflow-fixes <enjoy-digital> |\ | * 635a61e3 - targets/arty: use sys_clk_freq = 60MHz for Symbiflow toolchain <Mariusz Glebocki> | * 5071ef3e - build/xilinx/symbiflow: remap part name <Mariusz Glebocki> |/ * 55723f13 - software/liblitedram: revert sdrsw() in sdrlevel: this is still required for sdrlevel command. <Florent Kermarrec> * ddcf68c0 - Merge pull request #553 from ozbenh/sim-autoinit <enjoy-digital> |\ | * 4a6256a5 - sdram: Unconditionally switch to SW control before inits <Benjamin Herrenschmidt> * | 47bb3d79 - Merge pull request #557 from antmicro/mor1kx_linux_booting <enjoy-digital> |\ \ | * | f1e7d73e - bios: boot: Boot linux on mor1kx with external device tree and rootfs <Mateusz Holenko> * | | 10ff9d76 - CHANGES: update and change added features order. <Florent Kermarrec> |/ / * | 5d202ddb - test: update. <Florent Kermarrec> * | 01f7947b - targets: rename gateware-toolchain parameter to toolchain. <Florent Kermarrec> * | 245985d6 - targets/arty: integrate symbiflow changes to avoid duplication. <Florent Kermarrec> * | 89106873 - build/generic_platform: add default_clk constraints only when used. <Florent Kermarrec> * | 0cd613cc - build/xilinx/symbiflow: reuse .xdc generation from Vivado to avoid duplication, fix copyright. <Florent Kermarrec> * | 80ec5eca - boards/arty: remove specific arty_symbiflow platform and adapt target to use standard platform. <Florent Kermarrec> * | af928b26 - xilinx/simbiflow: add simple symbiflow_device re-mapping. <Florent Kermarrec> * | 5104d07a - Merge pull request #551 from antmicro/mglb/symbiflow-toolchain-xilinx-7-support <enjoy-digital> |\ \ | * | 7434376c - test/test_targets: add arty_symbiflow <Mariusz Glebocki> | * | ae121aac - targets: add arty_symbiflow <Mariusz Glebocki> | * | 2bb2fbdb - platforms: add arty_symbiflow <Mariusz Glebocki> | * | bd702397 - build/xilinx: add Symbiflow toolchain support <Mariusz Glebocki> | |/ * | 77139289 - Merge pull request #552 from ozbenh/memspeed-long <Tim Ansell> |\ \ | * | 6239eac1 - sdram: Use unsigned long for memory test <Benjamin Herrenschmidt> | |/ * | a116578c - Merge pull request #550 from antmicro/jboc/spd-read <enjoy-digital> |\ \ | * | a433c837 - bios/litedram: add option to verify SPD EEPROM memory contents <Jędrzej Boczar> | * | 1692dfbf - build/sim/spdeeprom: use hex format when loading from file <Jędrzej Boczar> * | | b98a9192 - Merge pull request #549 from antmicro/mglb/fix-vivado-yosys <enjoy-digital> |\ \ \ | |_|/ |/| | | * | a4e83234 - build/xilinx: do not assume build name is "top" <Mariusz Glebocki> |/ / * | 5cc7a988 - Merge pull request #547 from gsomlo/gls-fix-sdcard-status <enjoy-digital> |\ \ | * | 28290efd - soc/software/litesdcard: update for response register back to 128 bits <Gabriel Somlo> * | | 395af900 - interconnect/wishbone/DownConverter: skip accesses on slave when sel==0 and simplify. <Florent Kermarrec> * | | 511832a9 - soc/interconnect/axi: generate wishbone.sel for reads. <Florent Kermarrec> * | | 4f82a36a - soc/software: only keep 32-bit CSR alignment support. <Florent Kermarrec> |/ / * | 75936775 - wishbone/wishbone2csr: use wishbone.sel on CSR write. <Florent Kermarrec> * | b1ec092e - soc/software/litesdcard: use new send register to send command and remove CSR8_CMD_FIX. <Florent Kermarrec> * | efcba14b - platforms/nexys_video: add spisdcard pins. <Florent Kermarrec> * | 119ce56f - targets/nexys_video: add spi-sdcard and sdcard support. <Florent Kermarrec> * | cc595017 - plaforms/nexys_video: keep up to date with litex-boards. <Florent Kermarrec> * | 5cc564fb - targets: simplify Ethernet/Etherbone integration on targets with both. <Florent Kermarrec> * | 55c7461e - bios/cmds/cmd_litesdcard: rewrite comments/descriptions. <Florent Kermarrec> * | 6cb03963 - bios/main: replace / with -. <Florent Kermarrec> * | 5dd5f97b - Merge pull request #545 from gsomlo/gls-fix-mmptr <enjoy-digital> |\ \ | * | 3e1b17d4 - csr: fix simple accessor alignment <Gabriel Somlo> * | | 6c1e2d84 - software/liblitesdcard: replace hexdump with dump_bytes already available in the BIOS. <Florent Kermarrec> |/ / * | 9e068a74 - soc/add_sdcard: add with_emulator parameter to use SDCard emulator (from Google Project Vault) and integrate it in litex_sim. <Florent Kermarrec> * | 2ae55e80 - setup.py: add litex_jtag_uart and litex_crossover_uart to console_scripts. <Florent Kermarrec> * | 62d939e8 - Merge pull request #543 from antmicro/jboc/eeprom-sim <enjoy-digital> |\| | * a0ce4ce5 - litex/build/sim: add module for simulating SPD EEPROM <Jędrzej Boczar> * | c4f96318 - targets/nexys4ddr: fix sdcard assert. <Florent Kermarrec> * | 76cc112e - bios: add main bus and csr bus infos, use KiB/GiB. <Florent Kermarrec> |/ * 02072dea - integration/soc/add_sdcard: always use 32-bit/512bytes memories (not sure this will change?) and allocate sdwrite/sdread regions dynamically. <Florent Kermarrec> * 4b3afa75 - integration/soc: add add_sdcard method with integration code from nexys4ddr. <Florent Kermarrec> * c78caeb9 - csr: Fix definition(s) of CSR_BASE in generated headers <Benjamin Herrenschmidt> * f8bb500a - liblitedram/sdram: Add option to disable cdelay() <Benjamin Herrenschmidt> * 6d72ef28 - cpu/serv: add variants. <Florent Kermarrec> * fd7ec50e - soc/integration/export: add optional csr_base parameter. <Florent Kermarrec> * 795ff08a - build/sim/verilator: add regular_comb parameter (that defaults to False) and pass it to get_verilog. <Florent Kermarrec> * 25d2e7c9 - Merge pull request #542 from gsomlo/gls-sdcard-followup <enjoy-digital> |\ | * 6da98ca1 - software/bios: fixup sdclk command <Gabriel Somlo> * | 3fd6ecd8 - Merge pull request #541 from antmicro/jboc/spd-read <enjoy-digital> |\ \ | * | 1172c10a - bios: move I2C from liblitedram to libbase <Jędrzej Boczar> | * | 472bf9ac - bios/sdram: expose I2C functions <Jędrzej Boczar> | * | bdc7eb5c - litex_sim: load SPD data from files in hexdump format as printed in BIOS <Jędrzej Boczar> | * | a42dc974 - bios/sdram: add BIOS command for reading SPD <Jędrzej Boczar> | * | 8fd3e74e - bios/sdram: add firmware for reading SPD EEPROM <Jędrzej Boczar> * | | 68f83cbc - CHANGES: document deprecated/moved modules. <Florent Kermarrec> * | | ab806060 - soc/core/uart: move WishboneStreamingBridge in it and rename to Stream2Wishbone. <Florent Kermarrec> * | | 0a3d649a - interconnect/wishbone: integrate Wishbone2CSR. <Florent Kermarrec> * | | b5b88d27 - interconnect/csr_bus: add separators. <Florent Kermarrec> * | | 86952a6e - interconnect/wishbone: remove CSRBank (probably not used by anyone). <Florent Kermarrec> * | | e404608c - interconnect/wishbone: add separators and move SDRAM/Cache. <Florent Kermarrec> * | | 1fddd0e3 - interconnect/wishbone: simplify DownConverter. <Florent Kermarrec> * | | e0d26820 - interconnect/wishbone: remove UpConverter (probably not used by anyone and would need to be rewritten). <Florent Kermarrec> | |/ |/| * | 696b31ed - tools/litex_sim: switch to SoCCore/add_sdram instead of SoCSDRAM. <Florent Kermarrec> * | 2efcf879 - targets/nexys4ddr: update add_sdcard method. <Florent Kermarrec> * | 2934c085 - CHANGES: add JTAG UART. <Florent Kermarrec> * | 3b47d4a4 - tools/litex_jtag_uart: add openocd config and telnet port parameters. <Florent Kermarrec> * | 67cf6703 - cpus: remove common cpu variants/extensions definition and simplify variant check. <Florent Kermarrec> * | 062ff67e - cpu/microwatt: add standard+ghdl variant that uses GHDL Yosys plugin. <Florent Kermarrec> * | 24687cbd - tools/litex_client/RemoteClient: add base_address parameter. <Florent Kermarrec> * | 78a9579e - cores/uart/RS232PHYTX: fix startbit duration by pre-loading phase_accumulator_tx to tuning_word. <Florent Kermarrec> * | 370e4652 - Merge pull request #539 from dayjaby/pr-fix_uart_startbit <enjoy-digital> |\ \ | * | e853ad4b - fix uart startbit: 1 cycle later <David Jablonski> * | | c75cf45a - tools: add litex_jtag_uart to create a virtual uart for the jtag uart. <Florent Kermarrec> * | | 2cf83b9f - tools: rename litex_crossover poc to litex_crossover_uart, remove from setup for now. <Florent Kermarrec> * | | bed5aafd - tools: add litex_crossover to be able to use lxterm (and serialboot) over a crossover UART (bridged over UART/Ethernet/PCIe/USB, etc...). <Florent Kermarrec> * | | 3833bc3e - litex_sim: override uart_name to sim only for serial. <Florent Kermarrec> * | | da7fd308 - CHANGES: update. <Florent Kermarrec> * | | 2fb52e66 - integration/soc: remove TODO in header. <Florent Kermarrec> * | | b65f18c3 - cpu/cv32e40p: fix copyright year. <Florent Kermarrec> * | | 30f35170 - cpu/cv32e40p: add copyright and improve indentation. <Florent Kermarrec> * | | b23702ec - litex_setup/pythondata-cpu-cv32e40p: clone in recursive mode. <Florent Kermarrec> * | | 4c4cd335 - Merge pull request #535 from antmicro/arty-cv32e40p <enjoy-digital> |\ \ \ | * | | 2d6ee5aa - cores/cpu: add cv32e40p <Piotr Binkowski> | * | | ca8cb834 - software/bios/isr: add support for cv32e40p <Piotr Binkowski> | * | | 2903b1bf - litex_setup: add pythondata for cv32e40p <Piotr Binkowski> * | | | 7d09ea19 - Merge pull request #538 from antmicro/fix_libbase <enjoy-digital> |\ \ \ \ | * | | | 9d16b0fc - libbase: Include missing uart header <Mateusz Hołenko> |/ / / / * | | | 3d06dc02 - test/test_targets: update build_test. <Florent Kermarrec> * | | | 42350f6d - platforms/targets: keep in sync with litex-boards. <Florent Kermarrec> * | | | 2eea7864 - build/sim: rename dut to sim (for consistency with other builds). <Florent Kermarrec> * | | | a6cbbc9d - integration/soc: set build_name to platform.name when not specified. <Florent Kermarrec> * | | | 16417cb8 - software/liblitespi: fix #endif location. <Florent Kermarrec> * | | | 9bdb063b - Merge pull request #516 from antmicro/i2s_support_arty <enjoy-digital> |\ \ \ \ | * | | | ce499900 - Extend I2S capabilities <Pawel Sagan> * | | | | c2e9a26e - Merge pull request #534 from fjullien/fix_litex_sim_warn <enjoy-digital> |\ \ \ \ \ | |/ / / / |/| | | | | * | | | 7c5f56c2 - litex/sim: fix compiler warnings <Franck Jullien> |/ / / / * | | | 6fedaa70 - Merge pull request #533 from antmicro/fix-dummy-bits-function-name <enjoy-digital> |\ \ \ \ | * | | | ab41e27e - software/liblitespi/spiflash: fix dummy bits setup function name <Jan Kowalewski> |/ / / / * | | | d71152ef - litex_setup: move requests import to avoid having to install it on travis. <Florent Kermarrec> * | | | 9854fdd5 - .travis: install requests package before running litex_setup.py. <Florent Kermarrec> * | | | bd0f21ba - targets/netv2: remove LiteSPI integration (not mature enough to be directly integrated on targets). <Florent Kermarrec> * | | | 80eca300 - software/liblitespi/spiflash: review/simplify/update and test on arty. <Florent Kermarrec> * | | | 4a175620 - build/xilinx: simplify LITEX_ENV_ISE/VIVADO handling. <Florent Kermarrec> * | | | e91c3171 - software/bios: cleanup includes and specify the lib in the include. <Florent Kermarrec> * | | | c3a03d0d - software: create liblitespi and mode litespi code to it (with some parts commented out for now). <Florent Kermarrec> * | | | 61238bee - soc/software/bios: add autoconfiguration functionality for LiteSPI core <Jan Kowalewski> * | | | d3890055 - litex_setup: add automatic update of litex_setup (because it also changes) and be sure we are on master branch before update. <Florent Kermarrec> * | | | 939f546a - Merge pull request #531 from gsomlo/gls-bios-linker <enjoy-digital> |\ \ \ \ | |_|/ / |/| | | | * | | c5524dbf - software/bios: fix link order to avoid undefined symbol errors <Gabriel Somlo> |/ / / * | | b4267a79 - build/xilinx: source settings64.sh automatically just before build if LITEX_ENV_ISE/LITEX_ENV_VIVADO environment variables are set. <Florent Kermarrec> * | | de7e0ee9 - integration/soc_core: avoid cpu_variant check if custom cpu_cls is passed. <Florent Kermarrec> * | | 6f8f0d23 - litex_setup: add litehyperbus and remove hyperbus core/test. <Florent Kermarrec> |/ / * | 109fd267 - integration/builder: simplify default output_dir to "build/platform". <Florent Kermarrec> * | 55c0ddab - litex_setup: add sha1 support on git clone/pull and fix microwatt to a specific sha1. <Florent Kermarrec> |/ * 23d43a2c - Merge pull request #530 from enjoy-digital/bios-libs <enjoy-digital> |\ | * 7192397a - software/libbase: remove linker-sdram (unused). <Florent Kermarrec> | * b4b84def - software/bios: mode spisdcard code to liblitesdcard. <Florent Kermarrec> | * 21e2a34c - software/bios: rename commands to cmds and update with libs' names. <Florent Kermarrec> | * 33f6ce74 - software/bios: move hw flags definitions to respective libs, remove hw/flags.h. <Florent Kermarrec> | * 403355a8 - software: create liblitescard and move sdcard init/test code to it. <Florent Kermarrec> | * 920d0ee5 - software: create liblitedram and move sdram init/test code to it. <Florent Kermarrec> | * c95084e5 - bios/software: rename cmd_dram/cmd_sdcard/cmd_spi_flash to cmd_litedram/cmd_litesdcard/cmd_spiflash. <Florent Kermarrec> | * 573a8815 - software/bios/commands: rename cmd_mdio to cmd_liteeth. <Florent Kermarrec> | * ff8d9e61 - software/bios: move mdio to libliteeth. <Florent Kermarrec> | * 70a67ce7 - software/bios: rename libnet to libliteeth and move all ethernet files to it. <Florent Kermarrec> | * 56b8723b - software/bios: rename cmd_mem_access to cmd_mem. <Florent Kermarrec> |/ * a02077d5 - cpu/microwatt/add_sources: add use_ghdl_yosys_synth parameter to convert microwatt to verilog using GHDL-Yosys-plugin and use converted verilog for build. <Florent Kermarrec> * b5352f40 - cpu/microwatt: update microwatt_wraper.vhdl <Florent Kermarrec> * be25500e - uptime: rework and integrate it in Timer to ease software support. <Florent Kermarrec> * d6549ff8 - bios: add uptime command and rewrite cmd_bios comments. <Florent Kermarrec> * fc0e55be - soc: improve uptime comments. <Florent Kermarrec> * 840679ad - Merge pull request #526 from rprinz08/master <enjoy-digital> |\ | * 3f649077 - Make booting from SD-Card to behave same as from SPI flash <rprinz08> * | 82364de5 - soc/SoCController: add uptime since start (disabled by default) and allow features to be enabled/disabled. <Florent Kermarrec> |/ * 3391398a - bios/sdram: always show bitslip on two digits to keep scan aligned. <Florent Kermarrec> * 4a5072a0 - Merge pull request #517 from ozbenh/csr-access-rework <enjoy-digital> |\ | * 1e35b0e7 - csr: Rework accessors <Benjamin Herrenschmidt> |/ * d4f44597 - CHANGES: update. <Florent Kermarrec> * a51c7a7b - Merge pull request #518 from enjoy-digital/csr_base <enjoy-digital> |\ | * 748ef1ad - export: add define of CSR_BASE if not already defined and use it for CSRs definitions/accesses. <Florent Kermarrec> * | 177c1e53 - Merge pull request #523 from DurandA/patch-5 <enjoy-digital> |\ \ | * | 9d9e7d54 - Update litex_term help <Arnaud Durand> |/ / * | 2e59dc32 - platforms/nexys4ddr: add card detect pin to sdcard. <Florent Kermarrec> * | 51742be2 - integration/soc: review/simplify interconnect and add logger.info. <Florent Kermarrec> * | 78413cc0 - Merge pull request #519 from ozbenh/point2point <enjoy-digital> |\ \ | |/ |/| | * 1ed68691 - soc: Revive generation of a PointToPoint interconnect <Benjamin Herrenschmidt> |/ * 9f941138 - test/test_targets: workaround to fix travis. <Florent Kermarrec> * 9d1443c1 - cpu/soc_core: automatically set csr mapping to 0x00000000 when using CPUNone, remove csr_base parameter that was used for that. <Florent Kermarrec> * 5ea3bae0 - bios/boot: review/fix #503. <Florent Kermarrec> * bf7857f5 - Merge pull request #503 from rprinz08/master <enjoy-digital> |\ | * 1f55fcf4 - fixed bug in BIOS spi flash "fw" command <rprinz08> | * f062c0c4 - removed FLASH_BOOT_OFFSET, replaced memcyp with copy_image_from_flash_to_ram <rprinz08> | * ea232fc5 - BIOS boot firmware from SPI with address offset <rprinz08> * | b4e349eb - Merge pull request #513 from mubes/bios_linker <enjoy-digital> |\ \ | * | d2d82dac - Bios linker edits to prevent inappropriate optimisation <Dave Marples> |/ / * | 3fb99b7d - cores/spi_flash: add back old SpiFlashDualQuad and rename new one as SpiFlashQuadReadWrite. <Florent Kermarrec> * | 2a5a7536 - Merge pull request #478 from antmicro/extended_spi_flash <enjoy-digital> |\ \ | * | 00f973ea - spi_flash: extend non-bitbanged flash support <Jakub Cebulski> | * | a344e20b - spi_flash: fix building without bitbang <Jakub Cebulski> * | | 7d79da8e - Merge pull request #510 from mubes/colorlight_usb <enjoy-digital> |\ \ \ | * | | 84997332 - Fix dumb missing line <Dave Marples> | * | | 33e202ed - Bring into line with master <Dave Marples> | |\ \ \ | * | | | dc1d4520 - Addition of boot address parameter for trellis builds <Dave Marples> * | | | | 3a6dd95d - integration/soc: review/simplify changes for standalone cores. <Florent Kermarrec> * | | | | 0d5eb133 - Merge pull request #511 from ozbenh/standalone-cores <enjoy-digital> |\ \ \ \ \ | * | | | | f628ff6b - WB2CSR: Use CSR address_width for the wishbone bus <Benjamin Herrenschmidt> | * | | | | 520c17e9 - soc_core: Add option to override CSR base <Benjamin Herrenschmidt> | * | | | | ecbd4028 - soc: Don't update CSR alignment when there is no CPU <Benjamin Herrenschmidt> | * | | | | f28f2471 - soc: Don't create a wishbone slave to LiteDRAM with no CPU <Benjamin Herrenschmidt> | * | | | | dcc881db - soc: Don't create a share intercon with only one master and one slave <Benjamin Herrenschmidt> | | |/ / / | |/| | | * | | | | 873d95e5 - interconnect/wishbonebridge: refresh/simplify. <Florent Kermarrec> * | | | | c136113a - Merge pull request #506 from scanakci/blackparrot_litex <enjoy-digital> |\ \ \ \ \ | * | | | | aed1d514 - Update README.md and core.py for BlackParrot <sadullah> | * | | | | 5e4a4360 - Vivado Command Update for Systemverilog <sadullah> | |/ / / / * | | | | d2c9d385 - Merge pull request #508 from antmicro/update_litesdcard <enjoy-digital> |\ \ \ \ \ | |/ / / / |/| | | | | * | | | 0db35069 - Update Litex bios to handle updated litesdcard. <Kamil Rakoczy> |/ / / / * | | | 3ce90100 - Merge pull request #505 from DurandA/patch-3 <enjoy-digital> |\ \ \ \ | * | | | 2c40967b - Enable 1x mode on SPI flash <Arnaud Durand> | | |_|/ | |/| | * | | | e2176cef - soc: remove with_wishbone (a SoC always always has a Bus) and expose more bus parameters. <Florent Kermarrec> * | | | 1e610600 - build/lattice/diamond/clock_constraints: review and improve similarities with the others build backends. <Florent Kermarrec> * | | | ebcf67c1 - Merge pull request #502 from shuffle2/master <enjoy-digital> |\ \ \ \ | * | | | eeee179d - diamond: close project when done <Shawn Hoffman> | * | | | 9b782bd7 - diamond: clock constraint improvements <Shawn Hoffman> | |/ / / * | | | 80f5327e - Merge pull request #490 from daveshah1/rdimm_bside_init <enjoy-digital> |\ \ \ \ | * \ \ \ 13db89eb - Merge branch 'master' into rdimm_bside_init <enjoy-digital> | |\ \ \ \ | |/ / / / |/| | | | * | | | | c9e36d7f - lattice/icestorm: add ignoreloops/seed support (similar to trellis) and icestorm_args. <Florent Kermarrec> * | | | | ea7fe383 - lattice/trellis: simplify seed support and add it to trellis_args. <Florent Kermarrec> * | | | | 5ee01c94 - Merge pull request #484 from ilya-epifanov/lattice-trellis-toolchain-seed <enjoy-digital> |\ \ \ \ \ | * | | | | ac1e9683 - Can now pass `--seed` to `nextpnr-ecp5` via `TrellisToolchain` `kwargs` <Ilya Epifanov> * | | | | | 5987ddb4 - Merge pull request #485 from ilya-epifanov/cpu-imac-config-for-vexriscv <enjoy-digital> |\ \ \ \ \ \ | * \ \ \ \ \ c5f74a5a - Merge branch 'master' into cpu-imac-config-for-vexriscv <enjoy-digital> | |\ \ \ \ \ \ | |/ / / / / / |/| | | | | | * | | | | | | 59d88a88 - integration/soc/add_adapter: rename is_master to direction. <Florent Kermarrec> * | | | | | | 57390666 - Merge pull request #504 from sergachev/master <enjoy-digital> |\ \ \ \ \ \ \ | * | | | | | | e4fa4bbc - integration/soc: fix add_adapter for slaves <Ilia Sergachev> |/ / / / / / / * | | | / / / 2d70220b - bios: Fix warning on 64-bit <Benjamin Herrenschmidt> | |_|_|/ / / |/| | | | | * | | | | | fbbbdf03 - core/led: simplify LedChaser (to have the same user interface than GPIOOut). <Florent Kermarrec> * | | | | | 05869beb - cores/led: add LedChaser (now that LiteX is running on FPGA mining boards let's use fancy led blinks :)) <Florent Kermarrec> * | | | | | 90c485fc - integration/soc: add clock_domain parameter to add_etherbone. <Florent Kermarrec> * | | | | | f1a50a21 - integration/soc: add add_uartbone method (to add a UARTBone aka UART Wishbone bridge). <Florent Kermarrec> | |_|_|/ / |/| | | | * | | | | 79ee135f - bios/sdram: fix lfsr typo. <Florent Kermarrec> * | | | | 162d3260 - Merge pull request #500 from mubes/fixups <enjoy-digital> |\ \ \ \ \ | * \ \ \ \ 2a37b97d - Merge branch 'master' of https://github.com/enjoy-digital/litex into fixups <Dave Marples> | |\ \ \ \ \ | * | | | | | 967e38bb - Small fixups to address compiler warnings etc. <Dave Marples> | | |_|_|_|/ | |/| | | | * | | | | | d74f8fc9 - build/xilinx: add disable_constraints parameter to Platform.add_ip. <Florent Kermarrec> | |/ / / / |/| | | | * | | | | 84841e1d - bios/sdram: fix merge typo in lfsr (thanks Benjamin Herrenschmidt). <Florent Kermarrec> * | | | | 99c5b0fc - bios/sdram: Use an LFSR to speed up pseudo-random number generation <Benjamin Herrenschmidt> * | | | | 34f26868 - Merge pull request #499 from DurandA/patch-2 <enjoy-digital> |\ \ \ \ \ | * | | | | 5e049d89 - Add data dirs to manifest <Arnaud Durand> * | | | | | 8b9aa16d - boards/platforms: update xilinx programmers. <Florent Kermarrec> * | | | | | 3c34039b - build/xilinx/vivado: ensure Vivado process our .xdc early. <Florent Kermarrec> |/ / / / / * | | | | b0578580 - gen/fhdl/verilog: explicitly define input/output/inout wires. <Florent Kermarrec> * | | | | 0aa3c339 - targets/genesys2: set cmd_latency to 1. <Florent Kermarrec> * | | | | 95b57899 - bios: remove usddrphy debug (we'll use a specific debug firmware to fix the usddrphy corner cases). <Florent Kermarrec> * | | | | 98d1b451 - platforms/targets: fix CI. <Florent Kermarrec> * | | | | 22bcbec0 - boards: keep in sync with LiteX-Boards, integrate improvements. <Florent Kermarrec> * | | | | 28f85c74 - build/lattice/programmer: add UJProg (for ULX3S). <Florent Kermarrec> * | | | | 85ac5ef1 - build/lattice/programmer: make OpenOCDJTAGProgrammer closer to OpenOCD programmer. <Florent Kermarrec> * | | | | 9a7f9cb8 - build/generic_programmer: catch 404 not found when downloading config/proxy. <Florent Kermarrec> * | | | | d0b8daa0 - build/platform: allow doing a loose lookup_request (return None instead of ConstraintError) and allow subname in lookup_request. <Florent Kermarrec> * | | | | b8f9f83a - build/openocd: add find_config method to allow using local config file or download it if not available locally. <Florent Kermarrec> * | | | | 9bef218a - cpu/microwatt: fix integration/crt0.S (thanks Benjamin Herrenschmidt). <Florent Kermarrec> * | | | | 6f24d46d - Merge pull request #496 from gsomlo/gls-fix-makefiles <enjoy-digital> |\ \ \ \ \ | * | | | | edfed4f0 - software/*/Makefile: no need to copy .S files from CPU directory <Gabriel Somlo> |/ / / / / * | | | | 7f8e34c6 - Merge pull request #494 from shuffle2/patch-2 <enjoy-digital> |\ \ \ \ \ | * | | | | ee413527 - diamond: quiet warning about missing clkin freq for EHXPLLL <shuffle2> |/ / / / / * | | | | 07e0153b - CHANGES: update. <Florent Kermarrec> * | | | | 21127031 - cpu/microwatt: add powerpc64le-linux-gnu to gcc_triple. <Florent Kermarrec> * | | | | c06a1279 - cpu/microwatt: add pythondata and fix build with it. <Florent Kermarrec> * | | | | 45377d9f - cpus: use a common definition of gcc_triple for the RISC-V CPUs, reorganize CPU by ISA/Data-Width. <Florent Kermarrec> * | | | | 7c69a6db - bios/cmd_mdio.c: fix missing <base/mdio.h> import. <Florent Kermarrec> * | | | | b0205335 - cpu/vexriscv: fix flush_cpu_icache, remove workaround on boot.c. <Florent Kermarrec> * | | | | 97e534d0 - cpus: add nop instruction and use it to simplify the BIOS. <Florent Kermarrec> * | | | | 4efc7835 - cpus: add human_name attribute and use it to simplify the BIOS. <Florent Kermarrec> * | | | | d81f171c - software/libbase/system.c: remove unused includes. <Florent Kermarrec> * | | | | 3bbadb35 - Merge pull request #492 from scanakci/blackparrot_litex <enjoy-digital> |\ \ \ \ \ | * \ \ \ \ 999b93af - Merge branch 'master' into blackparrot_litex <enjoy-digital> | |\ \ \ \ \ | |/ / / / / |/| | | | | * | | | | | 705d3887 - Merge pull request #474 from fjullien/term_hist_auto_compl <enjoy-digital> |\ \ \ \ \ \ | * | | | | | 74dc444b - bios: add auto completion for commands <Franck Jullien> | * | | | | | fc2b8226 - bios: switch command handler to a modular format <Franck Jullien> | * | | | | | 86cab3d3 - bios: move helper functions to their own file <Franck Jullien> | * | | | | | bc5a1986 - bios: add terminal history <Franck Jullien> | * | | | | | e764eabd - builder: add a parameter to pass options to BIOS Makefile <Franck Jullien> | | * | | | | 0c770e06 - Update README.md <Sadullah Canakci> | | * | | | | 19bb1b9b - update to comply with python-data layout <sadullah> | | * | | | | 3eb9efd6 - BP fpga recent version <sadullah> | | * | | | | bf864d33 - Fix memory transducer bug, --with-sdram for BIOS works, memspeed works <sadullah> | | * | | | | cf01ea65 - rebased, minor changes in core.py <sadullah> | | * | | | | b7b9a1f0 - Linux works, LiteDRAM works (need cleaning, temporary push) <sadullah> | | * | | | | 74140587 - Create GETTING STARTED <Sadullah Canakci> | |/ / / / / |/| | | | | * | | | | | e853cac6 - Merge pull request #483 from ilya-epifanov/lattice-openocd-jtag-programmer-erase-flag-and-quiet-output <enjoy-digital> |\ \ \ \ \ \ | * | | | | | a11f1c39 - Removed erase flag and made progress output less noisy <Ilya Epifanov> | | |_|_|/ / | |/| | | | * | | | | | a6779b9d - Merge pull request #491 from gsomlo/gls-spisd-clusters <enjoy-digital> |\ \ \ \ \ \ | * | | | | | c8e3bba4 - software: spisdcard: cosmetic: avoid filling screen with cluster numbers <Gabriel Somlo> * | | | | | | b5978b21 - .travis.yml: disable python3.5 test (nMigen requires 3.6+). <Florent Kermarrec> * | | | | | | 10371a33 - CHANGES: update. <Florent Kermarrec> * | | | | | | bd8a4100 - cpu/minerva: add pythondata and use it to compile the sources. <Florent Kermarrec> * | | | | | | e4a4659d - litex_setup: add nmigen dependency (used to generate Minerva CPU). <Florent Kermarrec> * | | | | | | d3e3ca06 - CHANGES: start listing changes for next release. <Florent Kermarrec> |/ / / / / / * | / / / / 3c70c83f - cpu/software: move flush_cpu_icache/flush_cpu_dcache functions to CPUs. <Florent Kermarrec> | |/ / / / |/| | | | * | | | | bb70a232 - cpu/software: move CPU specific software from the BIOS to the CPU directories. <Florent Kermarrec> * | | | | 0abc7d4f - cpu/Minerva: Clone the repository locally for now, we need to create a pythondata repository. <Florent Kermarrec> * | | | | b82b3b7e - integration/soc: rename usb_cdc to usb_acm. <Florent Kermarrec> * | | | | 0a1afbf6 - litex/__init__.py: remove retro-compat > 6 months old. <Florent Kermarrec> * | | | | 3531a641 - soc: allow passing custom CPU class to SoC. <Florent Kermarrec> | | | * | 83f4dcb2 - Added `imac` config for CPUs which implements the most basic working riscv32imac feature set, implemented for VexRiscv <Ilya Epifanov> | | |/ / | |/| | | | | * 64b50515 - Add RDIMM side-B inversion support <David Shah> | |_|/ |/| | * | | 90a6343d - Merge pull request #488 from enjoy-digital/python3.5 <enjoy-digital> |\ \ \ | |/ / |/| | | * | 9941e4c1 - travis: add back test on python3.5 (python3.6 is recommended but we can try to keep 3.5 compatibility until we have good reason to no longer support it). <Florent Kermarrec> |/ / * | 855d614e - Merge pull request #481 from betrusted-io/unfstringify <enjoy-digital> |\ \ | * | 17b76654 - propose patch to not break litex for python 3.5 <bunnie> |/ / * | 56aa7897 - create first release, add CHANGES and note about Python modules in README. <Florent Kermarrec> * | 6d0896de - cpu/serv: switch to pythondata package instead of local git clone. <Florent Kermarrec> * | 1b069268 - README: update Python minimal version to 3.6. <Florent Kermarrec> * | ff61b1f6 - litex_setup: disable automatic clone of BlackParrot/Microwatt CPUs, reorder LiteX data. <Florent Kermarrec> * | 4d86ab9d - Merge pull request #399 from mithro/litex-sm2py <enjoy-digital> |\ \ | * \ 317ea7ed - Merge branch 'master' into litex-sm2py <enjoy-digital> | |\ \ | * | | 1f356695 - litex_sim: Find tapcfg from pythondata module. <Tim 'mithro' Ansell> | * | | 3aee8a52 - Remove directories from submodules from MANIFEST.in file. <Tim 'mithro' Ansell> | * | | ebcb2a44 - Rename litex-data-XXX-YYY to pythondata-XXX-YYY <Tim 'mithro' Ansell> | * | | a39a4ec2 - Only allow fast-forward pulls. <Tim 'mithro' Ansell> | * | | e618d41f - Fixing mor1kx data finding. <Tim 'mithro' Ansell> | * | | 2e3b7f20 - Fix typo in error message. <Tim 'mithro' Ansell> | * | | 83b25813 - Fix the libcompiler_rt path. <Tim 'mithro' Ansell> | * | | 1c1c5bcb - Remove submodules. <Tim 'mithro' Ansell> | * | | c96d1e66 - Fix import for data. <Tim 'mithro' Ansell> | * | | 119985f3 - Use the current directory you are running. <Tim 'mithro' Ansell> | * | | 69367f8d - Make litex a namespace. <Tim 'mithro' Ansell> | * | | 3ae4f8f2 - Adding missing vexriscv CPU. <Tim 'mithro' Ansell> | * | | ac3fd794 - Adding missing comma. <Tim 'mithro' Ansell> | * | | 3df6c0c8 - Adding litex-data-software-compiler_rt as a required package. <Tim 'mithro' Ansell> | * | | 3964565e - Fixed quotes in `litex_setup.py` <Tim 'mithro' Ansell> | * | | d5a21a75 - Converting litex to use Python modules. <Tim 'mithro' Ansell> | / / * | | 5ef869b9 - soc/cpu: add memory_buses to cpus and use them in add_sdram. <Florent Kermarrec> * | | 467fee3e - soc/cpu: rename cpu.buses to cpu.periph_buses. <Florent Kermarrec> |/ / * | 05815c4e - Merge pull request #477 from shuffle2/patch-1 <enjoy-digital> |\ \ | * | f71014b9 - diamond: fix include paths <shuffle2> |/ / * | 4dece4ce - soc/cpu: simplify integration of CPU without interrupts (and automatically use UART_POLLING mode in this case). <Florent Kermarrec> * | c5ef9c73 - Merge pull request #473 from fjullien/memusage <enjoy-digital> |\ \ | * | 3892d7a9 - bios: print memory usage <Franck Jullien> * | | 9460e048 - tools/litex_sim: use similar analyzer configuration than wiki. <Florent Kermarrec> * | | 443cc72d - Merge pull request #476 from enjoy-digital/serv <enjoy-digital> |\ \ \ | * | | 1d1a4ecd - software/irq: cleanup and make explicit that irqs are not supported with Microwatt and SERV, fix compilation warning. <Florent Kermarrec> | * | | fb9e369a - serv: connect reset. <Florent Kermarrec> | * | | 71778ad2 - serv: update copyrights (Greg Davill found the typos/issues). <Florent Kermarrec> | * | | 1f9db583 - serv/cores: fix verilog top level (use serv_rf_top instead of serv_top), working :). <Florent Kermarrec> | * | | 2efd939d - serv: fix ibus/dbus byte/word addressing inconsistency, add missing ibus.sel (thanks @GregDavill). <Florent Kermarrec> | * | | 22c39236 - initial SERV integration. <Florent Kermarrec> | | |/ | |/| * | | c4c891de - build/icestorm: add verilog_read -defer option to yosys script (changes similar the ones applied to trellis). <Florent Kermarrec> * | | 192849f0 - Merge pull request #475 from gregdavill/read_verilog_defer <enjoy-digital> |\ \ \ | |_|/ |/| | | * | 642c4b30 - build/trellis: add verilog_read -defer option to yosys script <Greg Davill> |/ / * | 96e7e6e8 - bios/sdram: reduce number of scan loops during cdly scan to speed it up. <Florent Kermarrec> * | 43e1a5d6 - targets/kcu105: use cmd_latency=1. <Florent Kermarrec> * | 85a059bf - bios/sdram: add some margin on cdly ideal_delay, do the read_leveling even if write_leveling is not optimal. <Florent Kermarrec> * | 038e1bc0 - targets/kc705: manual DDRPHY_CMD_DELAY no longer needed. <Florent Kermarrec> * | aaed4b94 - bios/sdram: review/cleanup Command/Clock calibration, set window at the start instead of middle. <Florent Kermarrec> * | 33c7b2ce - Merge pull request #472 from antmicro/jboc/sdram-calibration <enjoy-digital> |\ \ | * | ab92e81e - bios/sdram: add automatic cdly calibration during write leveling <Jędrzej Boczar> * | | 4608bd18 - Merge pull request #470 from antmicro/jboc/sdram-eeprom-timings <enjoy-digital> |\ \ \ | |_|/ |/| | | * | b0f8ee98 - litex_sim: add option to create SDRAM module from SPD data <Jędrzej Boczar> * | | 0b3c4b50 - soc/cores/spi: add optional aligned mode. <Florent Kermarrec> * | | 6bb22dfe - cores/spi: simplify. <Florent Kermarrec> * | | fc434af9 - build/lattice/common: add specific LatticeiCE40SDROutputImpl/LatticeiCE40SDRTristateImpl (thanks @tnt). <Florent Kermarrec> * | | 1457c320 - xilinx/common: use a common SDRTristate implementation for Spartan6, 7-Series and Ultrascale. <Florent Kermarrec> * | | 69462e66 - build/xilinx/common: add 7-Series/Ultrascale SDROutput/Input. <Florent Kermarrec> * | | 65e6ddc6 - lattice/common: add LatticeECP5DDRInput. <Florent Kermarrec> * | | 2031f280 - lattice/common: cleanup instances, simplify tritates. <Florent Kermarrec> * | | 2d25bcb0 - lattice/common: add LatticeiCE40DDRInput, LatticeiCE40SDROutput and LatticeiCE40SDRInput. <Florent Kermarrec> | |/ |/| * | 56e15284 - platforms/de0nano: swap serial tx/rx to ease use of cheap FT232 based cables. <Florent Kermarrec> * | 08e4dc02 - tools/remote/etherbone: update import. <Florent Kermarrec> |/ * 19f983c4 - targets: manual define of the SDRAM PHY no longer needed. <Florent Kermarrec> * c0f3710d - bios/sdram: update/simplify with new exported LiteDRAM parameters. <Florent Kermarrec> * 3915ed97 - litex_sim: add phytype to PhySettings. <Florent Kermarrec> * c0c5ae55 - build/generic_programmer: move requests import to do it only when needed. <Florent Kermarrec> * c9ab5939 - bios/sdram/ECP5: set ERR_DDRPHY_BITSLIP to 4. <Florent Kermarrec> * litex-boards changed from cb95962 to 1356ebb * 1356ebb - targets/ecp5: update clocking on boards with DDR3 to use reset from ddrphy.init and use primary clock for Power on reset. <Florent Kermarrec> * 4997399 - Merge pull request #85 from oskirby/logicbone <enjoy-digital> |\ | * 76a32ba - Add Logicbone ECP5 board <Owen Kirby> * | efe33c9 - targets/arty: add fixed sdcard clock and remove sys2x (use NETWORKING interface_type on DDR3). <Florent Kermarrec> * | 6753a92 - targets: add fixed sdcard clock on boards with SDCard support. <Florent Kermarrec> * | 782c856 - platforms/genesys2: add usb_fifo. <Florent Kermarrec> * | 936ba5b - platforms/genesys2: add openocd specific …

mithro assigned enjoy-digital Aug 28, 2018

mithro closed this as completed Aug 29, 2018

mithro added a commit to mithro/litex-buildenv that referenced this issue Sep 2, 2018

targets/nexys_video: Fix for upstream change in UART interface

e19174c

Fixes litex-buildenv timvideos#42.

mithro mentioned this issue Sep 30, 2018

Updating submodules. #75

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Issue in nexys_video gateware with RS232PHYTX #42

Issue in nexys_video gateware with RS232PHYTX #42

mithro commented Aug 28, 2018

enjoy-digital commented Aug 28, 2018

enjoy-digital commented Aug 28, 2018 •

edited

mithro commented Aug 29, 2018

Issue in nexys_video gateware with RS232PHYTX #42

Issue in nexys_video gateware with RS232PHYTX #42

Comments

mithro commented Aug 28, 2018

enjoy-digital commented Aug 28, 2018

enjoy-digital commented Aug 28, 2018 • edited

mithro commented Aug 29, 2018

enjoy-digital commented Aug 28, 2018 •

edited