ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)
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Updated
Aug 29, 2018 - VHDL
ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)
Implementation of a sampler using the XADC mounted on the Arty A7-35T development board and the PmodAD1 by Digilent (AD7476A).
Sigma-Delta Analog to Digital Converter in FPGA (VHDL)
A set of VHDL examples for DE0 Nano
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