An implementation of Principal Direction Divisive Partitioning in CUDA. University project for the course "Software & Programming of High Perfomance Systems". Course Code: CEID_NE5407
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Updated
Oct 21, 2019 - Cuda
An implementation of Principal Direction Divisive Partitioning in CUDA. University project for the course "Software & Programming of High Perfomance Systems". Course Code: CEID_NE5407
Modelling parallel processing with GPU
Parallel implementation hack of inherently sequential algorithms. Random Number Generators - Additive LFG and GFSR - implemented with NVIDIA CUDA using Continuous Subsequence Technique and Leap Frog Technique. Paper presented in the International AI Conference 2022, Tel Aviv, Israel.
Parallelized histogram equalization for gray scale images using GPUs in CUDA C++ in a consumer-producer aproach (streams, RDMA, InfiBands)
Efficient implementations of Merge Sort and Bitonic Sort algorithms using CUDA for GPU parallel processing, resulting in accelerated sorting of large arrays. Includes both CPU and GPU versions, along with a performance comparison.
SHA256 Lookup using parallel processing on a NVidia CUDA Compatible Graphics card
RipeMD160 Lookup using parallel processing on NVidia CUDA Graphics card
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