FPGA Accelerator for CNN using Vivado HLS
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Updated
Oct 25, 2021 - C++
FPGA Accelerator for CNN using Vivado HLS
Source codes for High Level Synthesis for Fixed Progammable Gate Arrays (FPGAs). Can be converted to RTL using Vivado HLS or SDSoC.
xfOpenCV Optical Flow implemented on Zedboard with built aarch32 OpenCV libraries
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