Projects of the digital logic design lab (Fall01) at the University of Tehran.
-
Updated
Oct 6, 2023 - Verilog
Projects of the digital logic design lab (Fall01) at the University of Tehran.
Add a description, image, and links to the sequential-synthesis topic page so that developers can more easily learn about it.
To associate your repository with the sequential-synthesis topic, visit your repo's landing page and select "manage topics."