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Add generated clocks to clock API #153

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colinschmidt
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A relatively simple/straightforward API for generated clocks.

One could imagine an API that uses the source clock's name rather than port but I think these json/yml structures should be generated so thats not a big usability improvement?

edwardcwang and others added 30 commits September 20, 2017 00:50
Not sure if this file was deliberately omitted from creation, but creating it prevents an infinite loop if the target depends on the stamp
Otherwise macro extraction scripts may fail.
As per Colin, apparently won't be a major source of problems
…r structure

- Start of hammer-vlsi/"little hammer" structure
- Port existing synthesis and place and route scripts to new structure
- Get a working first pass with DC+saed32
Fix non-deterministic test
And support installs vs tarballs
@@ -110,6 +110,9 @@ vlsi.inputs:
# period (TimeValue) - Clock port period. e.g. "1 ns", "5ns". Default units: ns
# port (str) - Optional. If specified, this is the RTL path to the clock. Otherwise, the path is the same as the name.
# uncertainty (TimeValue) - Optional. Clock uncertainty. e.g. "1 ns", "5ns". Default units: ns
# generated (bool) - Optional. If specified this clock is generated from another clock, must specify source_port and divisor
# source_port (str) - Required if generated. The port of the clock that this clock is generated from.
# divisor (int) - Required if generated. The amount this generated clock is slowed from the source clock e.g. 2 => this clock will be two times slower than the source clock.
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  1. is it worth renaming "port" to "path" for clock constraints?

  2. Does the tool only support integer divisors?

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  1. Doesn't matter to me either way. I'll change it (port is slightly too specific).

  2. Yes. SDC supports only integers. It does also support multiplication but I don't have experience with that.

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Thanks for the explanation:

"SDC supports only integers. It does also support multiplication but I don't have experience with that." <-- can we add that as a comment to the file so we can remember this reasoning?

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4 participants