This project aims to design and implement a 16-Bit RISC Processor with VHDL, Karansing P. Thakor, by reference to Ankushkumar Pal’s published paper on ijet.org. Detailed information given in the report here
ISA referenced from previously mentioned work by A. Pal et al. also given below.
RTL View of designed CPU is also given below (generated with Intel Quartus Prime software)
Final utilization metrics is as follows.
This project is a result of a collabrated effort.
- Sümeyra Durak - sumeyraduraak@gmail.com
- Fatma Zülal Kiraz - kirazulal@gmail.com
- Umut Utku KOÇAK - umututku.kocak@gmail.com