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Currently much of the XML output is done using hand coded statements using fprintf or iostreams. This leads to the code being a lot more complicated (you have to pass around tab depths and stuff), error prone (IE Your not escaping XML entities correctly in all places) and longer than it needs to be.
Newer XML output code is thankfully using the pugixml library.
I believe the following files currently output XML by hand:
It would be good if all XML output was done using the pugixml library.
Open questions;
How to test the XML output doesn't change?
More?
Context
The Verilog to Routing code base is reasonable old and had many authors. Like all old code bases it has areas which could use cleanup, refactoring and improvement. This issue is just to track just one idea on how things can be improved.
The text was updated successfully, but these errors were encountered:
Makes a lot of sense. We weren't using a (reasonable) XML library when most of that code was written. Since we're already using pugixml it makes sense to use it.
The one I don't think we should change is libs/EXTERNAL/libcatch/catch.hpp since it's an externally developed library.
How to test the XML output doesn't change?
The most obvious would be to diff the before/after files (perhaps after formatting through xmllint for consistency).
However my main check would be that none of the regression tests fail. In particular the vtr_reg_basic and vtr_reg_strong tests.
I suppose another potential concern is that some of the output files (e.g. rr_graph.xml) can get pretty large (GBs); and I think pugixml stores the whole document in memory before it writes things out -- which could significantly increase VPR's peak memory use.
Current Behaviour
Currently much of the XML output is done using hand coded statements using
fprintf
oriostream
s. This leads to the code being a lot more complicated (you have to pass around tab depths and stuff), error prone (IE Your not escaping XML entities correctly in all places) and longer than it needs to be.Newer XML output code is thankfully using the pugixml library.
I believe the following files currently output XML by hand:
vpr/src/power/power.cpp
vpr/src/pack/output_clustering.cpp
vpr/src/route/rr_graph_writer.cpp
libs/EXTERNAL/libcatch/catch.hpp
Possible Solution
It would be good if all XML output was done using the pugixml library.
Open questions;
Context
The Verilog to Routing code base is reasonable old and had many authors. Like all old code bases it has areas which could use cleanup, refactoring and improvement. This issue is just to track just one idea on how things can be improved.
The text was updated successfully, but these errors were encountered: