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riscv: privileged: custom Interrupt Controller API #63214

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@amr-sc amr-sc commented Sep 28, 2023

It looks like the existing path providing IRQ handling functionality for PLIC within the RISC-V Privileged IRQ infrastructure basically fits to any Interrupt Controller which handles 2nd level IRQs, including the custom ones.

This change introduces the extension for RISC-V privileged IRQ infrastructure API to simplify addition of the custom Interrupt Controllers.

The specific Inerrupt Controller implementation is getting connected to the IRQ infrastructure through this API. The related functions are to be implemented by any custom Interrupt Controllers for 2nd level IRQ handling. At the same time no changes for the infrastructure itself is necessary when a new Interrupt Controller is added.

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amr-sc commented Sep 28, 2023

This change paves ground for #62606, ping @carlocaione

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amr-sc commented Oct 2, 2023

Hi @carlocaione , @fkokosinski , guys could you please take a look?
Thanks!

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amr-sc commented Oct 5, 2023

Hi @carlocaione ,

Could you please clarify the questions above?
Thanks!

@amr-sc amr-sc force-pushed the riscv-custom-ic branch 3 times, most recently from 1b07867 to f4cc7f8 Compare October 9, 2023 07:43
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amr-sc commented Oct 10, 2023

Hi @carlocaione , could you please take a look? I've addressed your comments.
Thanks!

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amr-sc commented Oct 11, 2023

Hi @carlocaione , just a general question (please correct me if I'm wrong): after adding the z_soc_ prefix to the API to be implemented by Custom IC we assume that the IC driver should be placed in soc/ directory and not in drivers/ directory, right?

I was expecting that we would use drivers/ directory for the IC driver. So maybe we should have z_ but drop soc part from that API? What do you think?

UPD: in case we decide to place the custom IC driver to drivers/ directory, then probably we shouldn't declare custom IC API under soc/ and move it to arch/riscv/irq.h instead? It does look like a generic RISC-V functionality which is not bound to particular SoC, but to be implemented by particular RISC-V IC driver

UPD2: @carlocaione , one step further in the direction of mentioned above: if we implement custom IC API within the IC driver code in drivers/interrupt_controller then why do we need to redefine the arch_irq_* functions at all? Why not to implement arch_irq_enable/disable/is_enabled/ z_riscv_irq_priority_set directly in the driver?

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Hi @carlocaione , just a general question (please correct me if I'm wrong): after adding the z_soc_ prefix to the API to be implemented by Custom IC we assume that the IC driver should be placed in soc/ directory and not in drivers/ directory, right?

Correct.

I was expecting that we would use drivers/ directory for the IC driver. So maybe we should have z_ but drop soc part from that API? What do you think?

But this IC is specific to your SoC (and in this case it can be very well in the soc/ directory, because it is only used by your platform) or it can be used by other SoCs as well (and in that case it should be indeed in the general drivers/ directory)?

UPD: in case we decide to place the custom IC driver to drivers/ directory, then probably we shouldn't declare custom IC API under soc/ and move it to arch/riscv/irq.h instead? It does look like a generic RISC-V functionality which is not bound to particular SoC, but to be implemented by particular RISC-V IC driver

Yes, if the driver can be used by different SoCs / platforms.

UPD2: @carlocaione , one step further in the direction of mentioned above: if we implement custom IC API within the IC driver code in drivers/interrupt_controller then why do we need to redefine the arch_irq_* functions at all? Why not to implement arch_irq_enable/disable/is_enabled/ z_riscv_irq_priority_set directly in the driver?

I don't think there is a strict rule here but if possible I'd like to keep separate the arch layer from the drivers layer, so avoiding declaring any arch_* function in a driver.

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amr-sc commented Oct 12, 2023

@carlocaione , please find my answers below:

But this IC is specific to your SoC (and in this case it can be very well in the soc/ directory, because it is only used by your platform) or it can be used by other SoCs as well (and in that case it should be indeed in the general drivers/ directory)?

Our custom IC (IPIC) is used with multiple Syntacore SoCs. Also in common case it seems that the same custom IC could be used with different RISC-V SoCs. Ok, so I'll remove the custom IC API declaration from soc/ to arch/ then.
Meanwhile, if some platform will have a unique SoC-specific IC it would still be able to allocate the driver within the soc/

UPD2: @carlocaione , one step further in the direction of mentioned above: if we implement custom IC API within the IC driver code in drivers/interrupt_controller then why do we need to redefine the arch_irq_* functions at all? Why not to implement arch_irq_enable/disable/is_enabled/ z_riscv_irq_priority_set directly in the driver?

I don't think there is a strict rule here but if possible I'd like to keep separate the arch layer from the drivers layer, so avoiding declaring any arch_* function in a driver.

I've just checked and it seems that actually a lot of interrupt controller drivers implement arch_irq_enable/disable/is_enabled functions. I'm also thinking this way: with redefinition of arch_irq_* functions, we show what? That for custom ICs we are skipping some architecture-wide layer, right? Such common layer is possible for standardized RISC-V controllers, like PLIC, but not the custom ones, since there is no common rule for them. Probably the redefinition is indeed better.
What do you say?

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Our custom IC (IPIC) is used with multiple Syntacore SoCs. Also in common case it seems that the same custom IC could be used with different RISC-V SoCs. Ok, so I'll remove the custom IC API declaration from soc/ to arch/ then. Meanwhile, if some platform will have a unique SoC-specific IC it would still be able to allocate the driver within the soc/

Yup, fine to me.

I've just checked and it seems that actually a lot of interrupt controller drivers implement arch_irq_enable/disable/is_enabled functions. I'm also thinking this way: with redefinition of arch_irq_* functions, we show what? That for custom ICs we are skipping some architecture-wide layer, right? Such common layer is possible for standardized RISC-V controllers, like PLIC, but not the custom ones, since there is no common rule for them. Probably the redefinition is indeed better. What do you say?

We are trying to clean-up tree-wide the usage of prefix and interfaces, see #61588 so I would still suggest to avoid using the arch_* prefix in the drivers to avoid getting caught in the cleaning process.

@amr-sc amr-sc force-pushed the riscv-custom-ic branch 2 times, most recently from 737f7ba to ac8094c Compare October 12, 2023 10:25
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amr-sc commented Oct 13, 2023

Hi @carlocaione , I've addressed your previous comments, please take a look.
Thanks!

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amr-sc commented Oct 16, 2023

Hi @carlocaione , just a kind reminder for a review

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amr-sc commented Oct 17, 2023

@carlocaione , @fkokosinski , guys there is no response from you unfortunately

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@carlocaione , @fkokosinski , guys there is no response from you unfortunately

please, stop pinging me every single day.

Read https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html#pr-review-escalation if you have not done it yet.

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amr-sc commented Oct 18, 2023

@carlocaione , @fkokosinski , guys there is no response from you unfortunately

please, stop pinging me every single day.

Read https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html#pr-review-escalation if you have not done it yet.

Hi @carlocaione ,
You're right, I didn't know about 1-week rule. Thanks for sharing this info!
I'm sorry for disturbing you

This change introduces the extension for RISC-V IRQ
infrastructure API to simplify addition of the custom Interrupt
Controllers.

The specific RISC-V Inerrupt Controller implementation is getting
connected to the Zephyr IRQ infrastructure through this API.
The related functions are to be implemented by any custom
Interrupt Controller driver.

Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
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amr-sc commented Oct 27, 2023

Hi @carlocaione , just a friendly reminder for a review

*
* @param irq IRQ number to enable
*/
void z_irq_enable(unsigned int irq);
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@nashif I'm out of touch with this topic. What's the latest on the z_* prefix?

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Hi @nashif ,

Is it fine if we use z_* prefix for RISC-V wide API for custom interrupt controllers?
Such API is to be instantiated by the particular RISC-V custom interrupt controller driver in /drivers/interrupt_controller.
Additionally we consider the special case when the interrupt_controller is soc-specific and the driver is placed in /soc/riscv

What do you think?

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Hi @nashif ,

There was no response from you unfortunately

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Hi @carlocaione , @nashif , @fkokosinski , I came to the Dev Meeting yesterday, but unfortunately you were not participating, so we weren't able to discuss the API. How would we proceed? Would you come to the next Dev Meeting, or maybe let's discuss it on other meeting, like Architecture WG? Or maybe you could suggest your proposal for this API here? This goes terribly slow

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sorry for missing all of this dicussion earlier. If you need someone in the devreview meeting, you need to notify them out of github somehow, it is easy to miss notifications. Anyways, the direction we are taking can be seen here: #61547.

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Hi @nashif ,

Thanks for your reply! I've checked your proposal and I think I've got your idea.
Please correct me if I'm wrong regarding the next steps here:

  1. Instead of z_irq_* functions introduced below we should bring the new prefix, platfrom_*, and change the API like this:
void platform_irq_init(void);
void platform_irq_enable(unsigned int irq);
void platform_irq_disable(unsigned int irq);
int platform_irq_is_enabled(unsigned int irq);
  1. We still want to define this API on include/zephyr/arch/riscv/ level and not e.g. include/zephyr/arch/ level.

  2. We should change RISCV_CUSTOM_INTERRUPT_CONTROLLER to more generic PLATFORM_HAS_CUSTOM_INTERRUPT_CONTROLLER and move this config from arch/riscv/Kconfig to arch/Kconfig

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Will push an update version of #61547 but while working on it, I realized that this issue and can be dealt with by providing an interrupt controller driver and should be a much cleaner solution than doing this using overrides and custom hooks, this is what drivers (and especially intc driver are supposed to do). So why can't this be solved using a driver? all of the above calls are basically what intc drivers are supposed to provide anyways. I will push my changes regardless, but we might to rethink the interrupt related part in it.

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Hi @nashif ,

all of the above calls are basically what intc drivers are supposed to provide anyways

Absolutely! Please take a look at how all those arch_irq_xxx() functions are implemented for RISC-V, it is just one or some other form of redirection to particular unique intc_ function.
And those functions are indeed should be implemented by any IC, no matter standard or custom one.
So introduction of the clean API mandatory for all the IC implementation may remove this level of indirection entirely.

We still have ARCH-specifics, but it does look, like this specifics could be kept on arch/ level instead of sipping to soc/ level (like we have with RISC-V) just for the sake of calling the unique intc_ function within a particular driver

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#66505 could become a generic solution

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amr-sc commented Nov 23, 2023

Hi @carlocaione , @nashif , @fkokosinski ,

How about to discuss it on Architecture WG meeting? In case you like the idea, could you please add a AWG label?

Thanks in advance!

@carlocaione carlocaione added the dev-review To be discussed in dev-review meeting label Nov 24, 2023
@carlocaione carlocaione added Architecture Review Discussion in the Architecture WG required and removed dev-review To be discussed in dev-review meeting labels Dec 4, 2023
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@carlescufi can you add this to the next arch meeting?

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nashif commented Dec 4, 2023

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@carlescufi can you add this to the next arch meeting?

this week it is @henrikbrixandersen

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@carlescufi can you add this to the next arch meeting?

this week it is @henrikbrixandersen

@carlocaione I've added it to today's Arch WG meeting agenda.

@cfriedt cfriedt requested a review from ycsin December 5, 2023 16:07
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cfriedt commented Dec 5, 2023

Kind of an important to note: it isn't always the case that there is a single interrupt controller to service all interrupts in a system.

Whatever API evolves from here must take that into account.

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cfriedt commented Dec 5, 2023

cc @ycsin @luchnikov

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cfriedt commented Dec 5, 2023

Just a note, part of the issue with the RISC-V PLIC is that the spec has some ambiguity.

riscv/riscv-plic-spec#52

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Architecture WG meeting 2023-12-05:

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