[ARM] Use temporary variable when loading more than 8 bits in chunkmemset_neon().

[mtl1979]

• ARMv7 does not support unaligned loads to vector registers from memory wider than 8 bits.

See #925.

[codecov]

Codecov Report

Merging #927 (24024a5) into develop (b82d349) will increase coverage by 0.00%.
The diff coverage is 100.00%.

@@           Coverage Diff            @@
##           develop     #927   +/-   ##
========================================
  Coverage    75.85%   75.86%           
========================================
  Files           74       74           
  Lines         8292     8294    +2     
  Branches      1369     1369           
========================================
+ Hits          6290     6292    +2     
  Misses        1472     1472           
  Partials       530      530           

Flag	Coverage Δ
macos_clang	68.65% <ø> (ø)
macos_gcc	67.64% <ø> (ø)
ubuntu_clang	70.27% <ø> (ø)
ubuntu_clang_debug	69.73% <ø> (ø)
ubuntu_clang_inflate_allow_invalid_dist	70.07% <ø> (ø)
ubuntu_clang_inflate_strict	70.33% <ø> (ø)
ubuntu_clang_mmap	70.04% <ø> (ø)
ubuntu_clang_msan	70.33% <ø> (ø)
ubuntu_gcc	70.31% <100.00%> (+<0.01%)	⬆️
ubuntu_gcc_aarch64	70.27% <100.00%> (ø)
ubuntu_gcc_aarch64_compat_no_opt	67.97% <ø> (ø)
ubuntu_gcc_aarch64_no_acle	68.52% <100.00%> (ø)
ubuntu_gcc_aarch64_no_neon	68.21% <ø> (ø)
ubuntu_gcc_armhf	70.69% <100.00%> (ø)
ubuntu_gcc_armhf_compat_no_opt	67.97% <ø> (ø)
ubuntu_gcc_armhf_no_acle	69.81% <100.00%> (ø)
ubuntu_gcc_armhf_no_neon	70.12% <ø> (ø)
ubuntu_gcc_armsf	70.69% <100.00%> (+0.01%)	⬆️
ubuntu_gcc_armsf_compat_no_opt	67.97% <ø> (ø)
ubuntu_gcc_compat_no_opt	69.36% <ø> (ø)
ubuntu_gcc_mingw_i686	0.00% <ø> (ø)
ubuntu_gcc_mingw_x86_64	0.00% <ø> (ø)
ubuntu_gcc_no_avx2	69.65% <ø> (ø)
ubuntu_gcc_no_pclmulqdq	67.78% <ø> (ø)
ubuntu_gcc_no_sse2	68.97% <ø> (ø)
ubuntu_gcc_no_sse4	67.74% <ø> (ø)
ubuntu_gcc_o3	69.36% <ø> (ø)
ubuntu_gcc_osb	71.79% <ø> (ø)
ubuntu_gcc_ppc	71.13% <ø> (ø)
ubuntu_gcc_ppc64	70.32% <ø> (ø)
ubuntu_gcc_ppc64le	69.31% <ø> (ø)
ubuntu_gcc_s390x	68.49% <ø> (ø)
ubuntu_gcc_sparc64	71.03% <ø> (ø)
win64_gcc	72.82% <ø> (ø)
win64_gcc_compat_no_opt	74.16% <ø> (ø)

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Impacted Files	Coverage Δ
arch/arm/chunkset_neon.c	100.00% <100.00%> (ø)

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[mtl1979]

This is how the disassembly of the two relevant functions look now with gcc trunk:

chunkmemset_2(unsigned char*, __simd128_uint8_t*):
 ldrh r3, [r0, #0]
 vdup.16 q8, r3
 vst1.64 {d16-d17}, [r1 :64]
 bx lr
chunkmemset_4(unsigned char*, __simd128_uint8_t*):
 ldr r3, [r0, #0]
 vdup.32 q8, r3
 vst1.64 {d16-d17}, [r1 :64]
 bx lr

bx lr is same as ret on x86 assembly. r0 is from, r1 is chunk and r3is tmp. I disabled inlining so the whole function doesn't get optimized away.

[nmoinvaz]

Assembly looks exactly like what we would want. Description in commit has good explanation. Nice job!

[kdrag0n]

This fixes the issue for me without changing the generated code on 64-bit ARMv8.