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Logic gates
Logic gates are devices that perform boolean functions. They take input and manipulate it to create an output. There are several types of logic gates. This wiki page will feature the logic gates that are present in LGL.
Several of the logic gates in LGL. The gates in LGL have two inputs and two outputs. The inputs are at the top. The outputs are at the bottom. Each gate only outputs 1 result. This result is copied onto both output blocks.
Many of these gates can have inverses (such as NAND, NOR, XNOR). These gates are not in LGL as they can be made from the gates already available by connecting gates and NOT gates. For example, a NAND gate can be created as so:
A NAND gate made in LGL using a NOT gate and an AND gate.
NOT gates are the simplest type of gate. They output the inverse of the input. For example, if the input is 0 (false), the gate outputs 1 (true).
| input 1 | output |
|---|---|
| 0 | 1 |
| 1 | 0 |
AND gates output 1 (true) if both of its inputs are 1 (true).
| input 1 | input 2 | Output |
|---|---|---|
| 0 | 0 | 0 |
| 1 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 1 | 1 |
OR gates output 1 (true) if either (or both) of its inputs is 1 (true). In other words, if one of its inputs is 1 (true), the gate outputs 1 (true).
| input 1 | input 2 | Output |
|---|---|---|
| 0 | 0 | 0 |
| 1 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 1 | 1 |
XOR gates output 1 (true) if either of its inputs is 1 (true). If both inputs are 1 (true), it outputs 0 (false).
| input 1 | input 2 | Output |
|---|---|---|
| 0 | 0 | 0 |
| 1 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 1 | 0 |
Logic gate lab, a project by EF0601. https://ef0601.github.io/Logic-gate-lab/
Use this wiki to learn more about the components and circuits you can make in LGL (Logic Gate Lab). This wiki is a work-in-progress, and I plan on explaining each logic component and mechanism in the simulation.
Try LGL with no downloads on the web.
Problems or feedback? Submit them on the Github issues page.
Contribute or check out the source code on GitHub.