- hw1proj
Verilog Vigenere Encryption / Decryption / Cracking
- hardwaresecurity1
C# Random Utility for making verilog faster
- RelativeLetterFrequencies
C# Vigenere Cracking Statistical Attack
- AESEncryption
Verilog Vivado project that performs AES Encryption
- DFAAES
C# Giraud Differential Fault Attack program
- EuclideanAlgorithmCalculator
C++ Extended Eucledian Algorithm
- TrojanDetectionCCAnalysis
C# Trojan Detection and Analysis (Hardware trojan detection)
- CMPE491_HW7_MODELSIM
Verilog VHDL AES Concurrent Error Detection (CED)
Project Git Description
I made this repo so I don't lose my progress on my code
I am just gonna leave this here
graph LR
A[THIS] -- IS --> B((REALLY))
#A --> D(Round Rect)
B --> C{Rhombus}
C --> D{cool}