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HORNET v2.0.0

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@jsphtkn jsphtkn released this 01 Nov 14:04
· 4 commits to main since this release

Version 2 of HORNET: RV32I/RV32IM/RV32IMF five-stage core with an IEEE 754 FPU, AXI4-Lite SoC, Nexys 4 DDR and Nexys Video flows, and a full verification environment. Two manuals attached: the HORNET manual (quick start and reference) and the HORNET student's manual (adds how every block works). Version 1 is release v1.2.0 on the legacy branch.