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Henk-Jan Lebbink edited this page Jun 5, 2018 · 13 revisions

CLD — Clear Direction Flag

Opcode Instruction Op/ En 64-bit Mode Compat/ Leg Mode Description
FC CLD ZO Valid Valid Clear DF flag.

Instruction Operand Encoding

Op/En Operand 1 Operand 2 Operand 3 Operand 4
ZO NA NA NA NA

Description

Clears the DF flag in the EFLAGS register. When the DF flag is set to 0, string operations increment the index registers (ESI and/or EDI). Operation is the same in all modes.

Operation

DF0;

Flags Affected

The DF flag is set to 0. The CF, OF, ZF, SF, AF, and PF flags are unaffected.

Exceptions (All Operating Modes)

#UD If the LOCK prefix is used.


Source: Intel® Architecture Software Developer's Manual (May 2018)
Generated: 5-6-2018

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