CPLD Development System - final v1.0.0

CPLD Development System - final v1.0.0

Archived final of the hand-designed Altera MAX 7000S / MAX 7000AE CPLD development board and ELEC 211 labs (2017-2018), by James Burney (K9DTV).

Project page: https://k9dtv.com/project-cpld.html

Current tree (master)

• Dual full Calculator Quartus builds: calulator/Calculator-full-5v/ (EPM7064S, 5 V) and calulator/Calculator-full-3v3/ (EPM7064AE, 3.3 V), plus board-test labs
• KiCad 4 PCB + Gerbers under PCB-files/
• Word write-ups in project docs/ with Markdown previews in project docs/markdown/ for GitHub reading
• Folder spellings (calulator, CLPD-grb) preserved on purpose

Release zip assets

The zip downloads attached to this tag are the packaged archives from the v1.0.0 cut. For the latest Calculator BDFs and Markdown previews, browse the master tree or clone the repo.

Tools

Quartus II 13.0 SP1 (or 17.1 Lite) + USB-Blaster; open KiCad files with a modern KiCad legacy importer, or send Gerbers to fab.

MIT -- see LICENSE.