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The M8 bus is a physical and electrical specification that describes a data bus, connection system, and PCB mechanical dimensions. It is designed to support the MC6809 processor completely, and many similar processors that use a synchronous bus, with only minor omissions.
It is oriented towards small retro-computing projects, where basic functionality is provided by a single board, but additional PCB's may be attached to add new functions, for example digital I/O, video, sound, etc.
The physical aspects of the specification were carefully crafted so that parts and processes that are readily available can be used. For example, the 40 pin socket it uses, is already widely used as a stacking connector for the Raspberry PI. The 10cm by 10cm PCB size is a maximum size for inexpensive builds at some PCB fabrication companies. The mounting holes are set up so that stacking is easy with threaded standoffs and screws. The connector location supports the use of the same PCB to construct either a stacking or a vertical installation on top of a main board.
The 40 connections on the M8 bus are functionally divided into 2 parts. One 20 pin subset of the bus, includes all the bus signals and power pins that are needed to interface a peripheral card. The remaining 20 pins, in conjunction with those, comprise a full featured CPU bus.
Here is a diagram to illustrate the 20/20 split of the 40 pins:
Vcc, GND are provided at both ends of the connector, and are symmetrical so that an accidental backwards insertion doesn't short the power supply. Also, a 20 pin only interface will use only one pair.
CPU address signals A0-A15
CPU data signals D0-D7
- E is the standard Motorola synchronous bus enable, or phi2 on the 6502. It indicates that addresses and control signals are valid, and clocks bus transfers on the falling edge
- R/W* read/write
- Q - quadrature clock on the 6809. Alternately used by AS on 6301 systems
- RESET - CPU/system reset, an active output from the controller (not open collector/drain)
- IRQ - primary interrupt input, open drain with pull ups on the controller
- NMI - non maskable interrupt for 6809, or secondary interrupt for other CPU's
- BA - 6809 bus available
- HALT - 6809 CPU halt
- BREQ - 6809 DMA request
- MRDY - 6809 wait state control
- IO - peripheral range select - controller output to enable devices in it's peripheral decode range
- DIS - input to controller, low level signal from a peripheral board will disable any on board bus devices on the controller (active output not open drain, so only one peripheral can use it). A controller has a resistive pull up to keep it high if nothing is connected.