Veri-Simple is a collection of Verilog code examples aimed at beginners or anyone interested in learning Verilog through hands-on practice. These examples are drawn from my university homework assignments and feature detailed comments and explanations to enhance understanding.
- Decoders
- Multiplexers (MUXes)
- Adders
- Subtractors
- Many other beginner-friendly circuits designed to run on the Cyclone V board.
Each example includes comprehensive comments that guide you through the Verilog code, making it easier to grasp how Verilog designs are structured and function in real hardware.
- Clone the repository:
git clone https://github.com/Mariam-Katamashvili/Veri-Simple.git
- Navigate to the example you are interested in and review the source files.
- Load the Verilog files onto your Cyclone V board environment to test and experiment with the circuits.
This project is licensed under the MIT License - see the LICENSE.md file for details.