Fix instabilities in CGEMM/CTRMM/DNRM2 on Apple M1/M2 under OSX #4003
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martin-frbg
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kernel/arm64/sgemm_kernel_sve_v2x8.S
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| #define alpha w18 | ||
| #define vec_len x19 | ||
| #define alpha w19 | ||
| #define vec_len x20 |
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This overlaps with the below register, and I don't believe this kernel is in scope of this PR?
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Potentially we could run ARMV8SVE on one of the AWS nodes for testing this in CI?
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Indeed, I missed moving veclen2 to x21. And not exactly in scope, but same problem (once Apple releases a Vortex cpu with SVE - I was not sure about the exact capabilities of M2 at the time) - but I can drop this file from the PR if you prefer
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The future cores might not have the same requirements so may be better to hold off?
Also, let me know if I can help with CI configuration, I have a history of missing things after all...
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reverted, thanks. And sadly none of our current CI providers offers SVE-capable hardware as far as I know - my blunder should eventually have been caught by running tests locally.
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for #3995 - M2 cpuid was still not matched correctly, the workaround for a corner case in DNRM2 could be optimized out by the compiler, and most importantly several ARM64 assembly kernels were still using (half of) register 18 that is reserved on OSX (as the previous round of fixes had only matched on x18, not w18)