remove unnecessary define in Makefile

Belonging to [master]:
  - #2275

Author: hkiel

Compiler/boot/Makefile.common

@@ -82,7 +82,7 @@ bootstrap-from-tarball:
 	$(MAKE) -f $(defaultMakefileTarget) --no-print-directory -C $(TOP_DIR)/Compiler/Template OMC="$(BOOTSTRAP_OMC)" clean
 	$(MAKE) -f $(defaultMakefileTarget) --no-print-directory -C $(TOP_DIR)/Compiler/Script OMC="$(BOOTSTRAP_OMC)" clean
 	$(MAKE) -f $(defaultMakefileTarget) generate-files-in-steps OMC="$(BOOTSTRAP_OMC)" "OMC_EXTRA_FLAGS=$(OMC_EXTRA_FLAGS)"
-	$(MAKE) -f $(defaultMakefileTarget) install INCLUDESOURCES=1 OMC="$(BOOTSTRAP_OMC)" CPPFLAGS="$(CPPFLAGS) -DOMC_BOOTSTRAPPING_STAGE_1"
+	$(MAKE) -f $(defaultMakefileTarget) install INCLUDESOURCES=1 OMC="$(BOOTSTRAP_OMC)" CPPFLAGS="$(CPPFLAGS)"
 	@echo "Bootstrapping phase 3/3 completed"
 
 runtime-depends: