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Fix timing of memblock #3062
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Fix timing of memblock #3062
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This commit add pipelineConnect between vlSplit/vsSplit and ldu/stu.
This commit refactor ready signal's logic, which will get better timing
This commit latch vaddr for merge Dcache's data and delay 1 cycle tlb request for better timing.
This commit remove SplitBuffer for better timing. The function of SplitBuffer is only used to store unsplit UOPs, and deletion has little impact.
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June 17, 2024 01:27
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