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  1. Pipeline_Processor_ECE552 Pipeline_Processor_ECE552 Public

    As the project of ECE 552 with deeper thinking of the forwarding and bypassing, and exception response operation

    Verilog 5 1

  2. FIR_Bluetooth_ECE551 FIR_Bluetooth_ECE551 Public

    Synthesis & Post-synthesis is based on the SAED32_lib(cell libary). Include the connection part based on A2D, UART, SPI, and the filter weighted & control part. Connect your cell phone to radio wit…

    SystemVerilog 2 1