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University of Washington
- Seattle, WA, 98105
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bespoke-silicon-group/bsg_manycore
bespoke-silicon-group/bsg_manycore PublicTile based architecture designed for computing efficiency, scalability and generality
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bespoke-silicon-group/basejump_stl
bespoke-silicon-group/basejump_stl PublicBaseJump STL: A Standard Template Library for SystemVerilog
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CNN-Digit-Recognition-Accelerated-on-FPGA
CNN-Digit-Recognition-Accelerated-on-FPGA PublicA CNN-based hardware digit/image recognition module designed on PyTorch and then implemented with Verilog on FPGA
Verilog 13
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SHA_SM3_SM4-Encryption-Algorithm
SHA_SM3_SM4-Encryption-Algorithm PublicWith basic SM3 & SM4 Encryption IP implemented with both Verilog and C , along with package for switching between SHA and SM3
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Backend-of-the-MES-Design
Backend-of-the-MES-Design PublicBackend part of the Intelligent Workshop project with Java, with basic CRUD, authority management and information maintenance modules, and product quality data analysis mapper & controller
Java 8
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