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change the BOOT.BIN image to be run on SD card #157
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sven2314
commented
Jan 13, 2022
- choose BOOT.BIN in package_no_aie_debug directory instead of package directory
- reserve Jtag method to run the application
modify the heap size in case of not to meet memory allocation error.
…nto 2021.1 change the BOOT.BIn image
imrickysu
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Jan 14, 2022
* Update README.md * Update README.md Updated Trademarks * Update README.md * Updated trademarks Co-authored-by: Shubhekshana <81768495+Shubhekshana@users.noreply.github.com>
imrickysu
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Nov 3, 2022
* Update README.md * Update README.md Updated Trademarks * Update README.md * Updated trademarks Co-authored-by: Shubhekshana <81768495+Shubhekshana@users.noreply.github.com>
CRTejaswi
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Oct 3, 2023
6e89d0b Merge pull request Xilinx#159 from mlechtan/next 9d78580 FFT QoR Repair, correcting int odd power of 2 dynamic cases. c376fd0 Merge pull request Xilinx#157 from mlechtan/next 37e2fc5 Documentation update. 2c448e8 Updating FFT QoR figures. 58ccac7 Merge pull request Xilinx#156 from mlechtan/next 6b9dbae FFT QoR Repair, fix for dyn point size cases 6259da8 Updating stats to extract extrema for multi-kernel configurations. 113ff1d Merge pull request Xilinx#6 from FaaSApps/next c5deabd restore matrix_mult case to AIE-only (Xilinx#155) 8852e38 Merge pull request Xilinx#154 from dbee/dbee-int32-input-stim f358d9a Add testcase to specifically test int32 3e3de06 Update gen_input calls 608e49d Merge pull request Xilinx#5 from FaaSApps/next 100a68d FFT QoR Repair, removing unroll_for. 0b6f2b1 Merge pull request Xilinx#153 from giorgiob/patch-2 d40d8a9 fix typo Co-authored-by: sdausr <sdausr@xilinx.com> test regression has passed.
CRTejaswi
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Oct 3, 2023
e1c3094 Merge pull request Xilinx#173 from tuol/disable_streamingKernel_cases_next dae2715 rm 3 failed cases 2f0ea3a Merge pull request Xilinx#172 from changg/round2-mks 57aa6e1 round 2 mks ef63da7 Merge pull request Xilinx#170 from tuol/disable_3_cases 64b1b16 temporally disable 3 cases due to u250 platform change d416285 Merge pull request Xilinx#168 from tuol/disable_cr_1122543 19bae9e disable gemm 4cu benchmark temporally bc75992 Merge pull request Xilinx#165 from yuanqian/next 224fd72 Merge pull request Xilinx#166 from tuol/fix_cr1110849 a347adb fix typo 044616c update description for gemm_1CU_gui and gemm_4CU_gui 36789da remove email from Jenkinsfile:https://jira.xilinx.com/browse/CR-1124831 9899738 Merge pull request Xilinx#164 from liyuanz/replace_cflags b6a65db replace cflags with clflags 3b6b704 Merge pull request Xilinx#163 from tuol/fix_cr_1110849 09d29dc add description for gemm_1CU_gui and gemm_4CU_gui d8b6309 Merge pull request Xilinx#161 from liyuanz/replace_blacklist 46d9741 replace whiltelist/blacklist to allowlist/blocklist 31a1844 Merge pull request Xilinx#159 from liyuanz/next 793bb77 increase time dc4bf25 Merge pull request Xilinx#158 from changg/update_mk1 9d95f7a fix makefile d14a716 Merge pull request Xilinx#156 from changg/update_mk 16ca954 fix makefile 2e07f80 fix json c076990 Merge pull request Xilinx#157 from liyuanz/replace_targets 1b40cd7 update targes 796fe49 update makefile f4e4d3a Merge pull request Xilinx#155 from changg/metadata 233c09b draft metadata files 3c67199 Merge pull request Xilinx#154 from changg/aws_support 8c9dd09 aws support 0c8684d change 2021.2_stable_latest to 2022.1_stable_latest Co-authored-by: sdausr <sdausr@xilinx.com>
CRTejaswi
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Oct 3, 2023
2079b9b Ethash SC prototype (Xilinx#150) c08ada1 merge tutorial (Xilinx#157) 04302db Merge pull request Xilinx#155 from changg/fix_issues f792a67 revert the change 98ccdea test 8fa693a fix security issues f60f3c8 Update Makefile (Xilinx#152) 9612886 Fix cr 1114888 1114873 (Xilinx#151) e622384 update rc4 benchmark case, reduce to 1 kernel (Xilinx#149) 8b43251 remove email from Jenkinsfile:https://jira.xilinx.com/browse/CR-1124831 (Xilinx#145) 3d86755 Fix cr 1114880 1114888 (Xilinx#146) 49d5003 Merge pull request Xilinx#144 from liyuanz/replace_cflags 43651c8 replace cflags with clflags ee65b70 Add open file failure guard and mode for read-only (Xilinx#143) a05e213 Merge pull request Xilinx#141 from liyuanz/replace_blacklist 9095130 replace whiltelist/blacklist to allowlist/blocklist fb7dfd6 Merge pull request Xilinx#137 from leol/fix-CR 4454482 Merge pull request Xilinx#138 from liyuanz/next ded8552 add mem for mem limit case 80dddf9 Fix for L1 CBC SC benchmarks host build issue dd68b83 Clang format crc32c_sc.cpp with 3.9.0 version 443fa59 Merge pull request Xilinx#132 from liyuanz/next 34bc727 Merge pull request Xilinx#134 from liyuanz/replace_targets be250a9 update targes 3e28567 update e0cbc3d Refine crc32c to improve the performance of the resdu line (Xilinx#133) 884b4f9 update c790abe update 0256aac update 61cb658 update Makefile and utils.mk 359c5b6 Clang format crc32c_sc.cpp for both 3.9.0 and 8.0.0 (Xilinx#131) 92cf068 SC L3 design of CRC32C (Xilinx#123) c00352b update Makefile for Vitis Flow testcase (Xilinx#128) 33c3c23 remove ssl linkage from library,json (Xilinx#127) c67da48 Merge pull request Xilinx#126 from changg/metadata 080686b draft metadata files e3efd4d add aws support (Xilinx#124) 87f65b0 change 2021.2_stable_latest to 2022.1_stable_latest Co-authored-by: sdausr <sdausr@xilinx.com>
CRTejaswi
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Oct 3, 2023
44f5cf2 Merge pull request Xilinx#162 from liyuanz/next 46dc211 update c3bb3f4 Merge pull request Xilinx#161 from liyuanz/next 35096ed add memory 056268a Merge pull request Xilinx#160 from liyuanz/add_mem 77ccfc2 update 06883c2 Merge pull request Xilinx#159 from changg/fix_meta 45146ba fix L1 meta 595687c Merge pull request Xilinx#158 from liyuanz/next 8500bf4 add mem 83586e7 Merge pull request Xilinx#157 from liyuanz/next 705a24f update abc9ac8 Merge pull request Xilinx#156 from tuol/cr_1144188 d05c895 remove ap_utils.h 5466249 change 2022.2_stable_latest to 2023.1_stable_latest Co-authored-by: sdausr <sdausr@xilinx.com>
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