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launch_emulator: command not found #163

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Candice-Yin opened this issue Jan 14, 2022 · 4 comments
Closed

launch_emulator: command not found #163

Candice-Yin opened this issue Jan 14, 2022 · 4 comments

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@Candice-Yin
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When I input the order "./launch_hw_emu.sh", it dispay as follows:
1642162481(1)
@randyh62
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It looks like the $PATH is not setup properly as the launch_emulator command should be accessible from the Vitis installation. This is usually configured when the environment is setup with the settings.sh script. The launch_hw_emu.sh script is generated by the v++ command during the build process, and should not need to be run under sudo.

@Candice-Yin
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@randyh62 Hi! I set up the $PATH as follows:
359e025d501dba521d73f82089a8997
bfead91e94d6f370755a47d67ef00e8
The strange thing is that I succeeded in this step before.

@randyh62
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randyh62 commented Jan 16, 2022 •
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It looks like your setup is correct. Not sure why it would work one time and not the next. Can you type "which launch_emulator" and see what is returned?

@Candice-Yin
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It looks like your setup is correct. Not sure why it would work one time and not the next. Can you type "which launch_emulator" and see what is returned?

I find that the problem is about user rights. Thank you. @randyh62

vmayoral pushed a commit to vmayoral/Vitis-Tutorials that referenced this issue Jan 20, 2022
Merge pull request Xilinx#163 from oliviert/2021.1_next
885f678 
Update Floating-Point, DSPLib in VMC and Super Sampling Rate to 2020.…
CRTejaswi pushed a commit to CRTejaswi/amd-vitis that referenced this issue Oct 3, 2023
Squashed 'blas' changes from a2c270b..e1c3094 (#547)
e9e2004 
e1c3094 Merge pull request Xilinx#173 from tuol/disable_streamingKernel_cases_next
dae2715 rm 3 failed cases
2f0ea3a Merge pull request Xilinx#172 from changg/round2-mks
57aa6e1 round 2 mks
ef63da7 Merge pull request Xilinx#170 from tuol/disable_3_cases
64b1b16 temporally disable 3 cases due to u250 platform change
d416285 Merge pull request Xilinx#168 from tuol/disable_cr_1122543
19bae9e disable gemm 4cu benchmark temporally
bc75992 Merge pull request Xilinx#165 from yuanqian/next
224fd72 Merge pull request Xilinx#166 from tuol/fix_cr1110849
a347adb fix typo
044616c update description for gemm_1CU_gui and gemm_4CU_gui
36789da remove email from Jenkinsfile:https://jira.xilinx.com/browse/CR-1124831
9899738 Merge pull request Xilinx#164 from liyuanz/replace_cflags
b6a65db replace cflags with clflags
3b6b704 Merge pull request Xilinx#163 from tuol/fix_cr_1110849
09d29dc add description for gemm_1CU_gui and gemm_4CU_gui
d8b6309 Merge pull request Xilinx#161 from liyuanz/replace_blacklist
46d9741 replace whiltelist/blacklist to allowlist/blocklist
31a1844 Merge pull request Xilinx#159 from liyuanz/next
793bb77 increase time
dc4bf25 Merge pull request Xilinx#158 from changg/update_mk1
9d95f7a fix makefile
d14a716 Merge pull request Xilinx#156 from changg/update_mk
16ca954 fix makefile
2e07f80 fix json
c076990 Merge pull request Xilinx#157 from liyuanz/replace_targets
1b40cd7 update targes
796fe49 update makefile
f4e4d3a Merge pull request Xilinx#155 from changg/metadata
233c09b draft metadata files
3c67199 Merge pull request Xilinx#154 from changg/aws_support
8c9dd09 aws support
0c8684d change 2021.2_stable_latest to 2022.1_stable_latest

Co-authored-by: sdausr <sdausr@xilinx.com>
CRTejaswi pushed a commit to CRTejaswi/amd-vitis that referenced this issue Oct 3, 2023
Squashed 'security' changes from c161ed9..c35483a (#702)
31907cf 
c35483a Merge pull request Xilinx#179 from liyuanz/next
dfc3cd2 fix description.json (Xilinx#180)
7f4febd update mk
53416f6 fix error in allocation pragma (Xilinx#178)
8ef77fa 2022.2 HMAC-SHA384 2in1 and ECDSA NIST P-384 (Xilinx#177)
489a68f add poseidon252 kernel and testcase (Xilinx#174)
bf96fd0 fix typo in tutorial.rst (Xilinx#176)
4e9d830 Merge pull request Xilinx#172 from yuanqian/update_doc_next
386656d fix bug
2ced06d fix description.json, remove vck190 from platform_property (Xilinx#175)
9118e6d missing vitis_hw_build (Xilinx#166)
d22b630 update
bdf2371 Merge pull request Xilinx#173 from liyuanz/next
dd3a1fb add mem
518370f update doc in next branch for porta;
f2b1ce6 Merge pull request Xilinx#171 from liyuanz/next
e4416f7 update mk
e735446 Merge pull request Xilinx#168 from changg/22.2_mks
a9b9570 Merge pull request Xilinx#167 from giorgiob/patch-2
8bd73a7 22.2 mk update
e1df4e8 u2_ platform name update
4715bf5 change 2022.1_stable_latest to 2022.2_stable_latest
c616562 fix typos in tutorial (Xilinx#163)

Co-authored-by: sdausr <sdausr@xilinx.com>
CRTejaswi pushed a commit to CRTejaswi/amd-vitis that referenced this issue Oct 3, 2023
Squashed 'hpc' changes from 44f5cf2..dec5326 (#815)
bec1cae 
dec5326 Merge pull request Xilinx#168 from liyuanz/add_mf
bd25480 update
aafb464 Merge pull request Xilinx#167 from RepoOps/rep_8
4cf3aa1 Merge pull request Xilinx#166 from changg/test_wa
01eb223 update mem
ef681d1 Merge pull request Xilinx#165 from changg/test_wa
f84b72e test wa
c2736ba Replace DEVICE with PLATFORM
7569ecd Merge pull request Xilinx#163 from liyuanz/add_freq
66d3b32 add mem

Co-authored-by: sdausr <sdausr@xilinx.com>
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@randyh62 @Candice-Yin