Vector Addition example doesn't build #311
Description
I'm trying to run the KV260 platform creation tutorial and am seeing an error in step 3 when building the example vadd application. At the point where we build the vadd_system_hw_link.prj, and from what I've debugged so far, the vpl.tcl script falls over when trying to rebuild the vivado project.
I don't really understand what the scripts are trying to do here but it looks like the create_project step fails because it's looking in the wrong path. I've copied the log file below and the directory structure under kv260_vitis_platform/vadd_system_hw_link/Hardware/binary_container_1.build/link/vivado looks like:
.
└── vpl
├── output
├── prj
│ ├── prj.cache
│ ├── prj.gen
│ ├── prj.hw
│ ├── prj.ip_user_files
│ └── prj.srcs
└── scripts
The error below is due to the fact that the srcs path is incorrect: kv260_vitis_platform/vadd_system_hw_link/Hardware/binary_container_1.build/link/vivado/vpl/prj/kv260_hardware_platform.srcs/utils_1/imports/synth_1/system_wrapper.dcp
#-----------------------------------------------------------
# Vivado v2022.1.2 (64-bit)
# SW Build 3605665 on Fri Aug 5 22:52:02 MDT 2022
# IP Build 3603185 on Sat Aug 6 04:07:44 MDT 2022
# Start of session at: Fri Oct 21 00:30:42 2022
# Process ID: 20715
# Current directory: /home/shareefj/git/genesee_fpga/workspace/kv260_tutorial/kv260_vitis_platform/vadd_system_hw_link/Hardware/binary_container_1.build/link/vivado/vpl
# Command line: vivado -log manual.log -mode batch -source vpl.tcl -notrace
# Log file: /home/shareefj/git/genesee_fpga/workspace/kv260_tutorial/kv260_vitis_platform/vadd_system_hw_link/Hardware/binary_container_1.build/link/vivado/vpl/manual.log
# Journal file: /home/shareefj/git/genesee_fpga/workspace/kv260_tutorial/kv260_vitis_platform/vadd_system_hw_link/Hardware/binary_container_1.build/link/vivado/vpl/vivado.jou
# Running On: JALAPINO, OS: Linux, CPU Frequency: 3800.260 MHz, CPU Physical cores: 24, Host memory: 33627 MB
#-----------------------------------------------------------
source vpl.tcl -notrace
[00:30:45] Run vpl: Step create_project: Started
INFO: [OCL_UTIL] current step: vpl.create_project
Creating Vivado project.
INFO: [OCL_UTIL] set ::origin_dir_loc .local/hw_platform/prj
INFO: [OCL_UTIL] set ::user_project_name prj
INFO: [OCL_UTIL] internal step: source .local/hw_platform/prj/rebuild.tcl to create prj project
INFO: [Project 1-1727] Source BDs should be added before importing the top BD /home/shareefj/git/genesee_fpga/workspace/kv260_tutorial/kv260_vitis_platform/vadd_system_hw_link/Hardware/binary_container_1.build/link/vivado/vpl/.local/hw_platform/prj/kv260_hardware_platform.srcs/sources_1/bd/system/system.bd with BDC
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2022.1/data/ip'.
ERROR: caught error: ERROR: [Common 17-69] Command failed: File '/home/shareefj/git/genesee_fpga/workspace/kv260_tutorial/kv260_vitis_platform/vadd_system_hw_link/Hardware/binary_container_1.build/link/vivado/vpl/prj/kv260_hardware_platform.srcs/utils_1/imports/synth_1/system_wrapper.dcp' does not exist
while executing
"rdi::set_property -name incremental_checkpoint -value /home/shareefj/git/genesee_fpga/workspace/kv260_tutorial/kv260_vitis_platform/vadd_system_hw_lin..."
invoked from within
"set_property -name "incremental_checkpoint" -value "$proj_dir/kv260_hardware_platform.srcs/utils_1/imports/synth_1/system_wrapper.dcp" -objects $obj"
(file ".local/hw_platform/prj/rebuild.tcl" line 272)
invoked from within
"source $hw_platform_rebuild_tcl"
[00:30:50] Run vpl: Step create_project: Failed
INFO: [OCL_UTIL] current step: vpl.create_project failed. To rerun the existing project please use --from_step vpl.create_project
Failed to rebuild a project required for hardware synthesis. The project is 'prj'. The rebuild script is '.local/hw_platform/prj/rebuild.tcl'. The rebuild script was delivered as part of the hardware platform. Consult with the hardware platform provider to investigate the rebuild script contents. An error stack with function names and arguments may be available in the 'vivado.log'.
INFO: [Common 17-206] Exiting Vivado at Fri Oct 21 00:30:50 2022...
Should this tutorial be working with 2022.1.2?