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hoganderheftig
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drm/i915/psr: Deactivate PSR only on LNL and when selective fetch enabled
Using intel_psr_exit in frontbuffer flush on older platforms seems to be causing problems. Sending single full frame update using intel_psr_force_update is anyways more optimal compared to psr deactivate/activate -> move back to this approach on PSR1, PSR HW tracking and Panel Replay full frame update and use deactivate/activate only on LunarLake and only when selective fetch is enabled. Tested-by: Lemen <lemen@lemen.xyz> Tested-by: Koos Vriezen <koos.vriezen@gmail.com> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14946 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250922102725.2752742-1-jouni.hogander@intel.com Cherry-picked-for: https://gitlab.archlinux.org/archlinux/packaging/packages/linux/-/issues/157
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drivers/gpu/drm/i915/display/intel_psr.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3365,6 +3365,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
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struct intel_display *display = to_intel_display(intel_dp);
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if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_enabled) {
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/* Selective fetch prior LNL */
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if (intel_dp->psr.psr2_sel_fetch_cff_enabled) {
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/* can we turn CFF off? */
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if (intel_dp->psr.busy_frontbuffer_bits == 0)
@@ -3383,12 +3384,19 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
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intel_psr_configure_full_frame_update(intel_dp);
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intel_psr_force_update(intel_dp);
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} else if (!intel_dp->psr.psr2_sel_fetch_enabled) {
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/*
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* PSR1 on all platforms
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* PSR2 HW tracking
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* Panel Replay Full frame update
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*/
3393+
intel_psr_force_update(intel_dp);
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} else {
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/* Selective update LNL onwards */
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intel_psr_exit(intel_dp);
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}
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3390-
if ((!intel_dp->psr.psr2_sel_fetch_enabled || DISPLAY_VER(display) >= 20) &&
3391-
!intel_dp->psr.busy_frontbuffer_bits)
3399+
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
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queue_work(display->wq.unordered, &intel_dp->psr.work);
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}
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