@@ -168,7 +168,7 @@ int UARTClass::read( void )
168168
169169void UARTClass::flush ( void )
170170{
171- while (_tx_buffer->_iHead != _tx_buffer->_iTail ); // wait for transmit data to be sent
171+ while (_tx_buffer->_iHead != *( volatile int *)&( _tx_buffer->_iTail ) ); // wait for transmit data to be sent
172172 // Wait for transmission to complete
173173 while (!uart_tx_complete (CONFIG_UART_CONSOLE_INDEX));
174174}
@@ -179,12 +179,11 @@ size_t UARTClass::write( const uint8_t uc_data )
179179 return (0 );
180180
181181 // Is the hardware currently busy?
182- if (_tx_buffer->_iTail != _tx_buffer->_iHead )
182+ if (_tx_buffer->_iTail != _tx_buffer->_iHead || ! uart_tx_ready (CONFIG_UART_CONSOLE_INDEX) )
183183 {
184184 // If busy we buffer
185185 int l = (_tx_buffer->_iHead + 1 ) % UART_BUFFER_SIZE;
186- while (_tx_buffer->_iTail == l)
187- ; // Spin locks if we're about to overwrite the buffer. This continues once the data is sent
186+ while (*(volatile int *)&(_tx_buffer->_iTail ) == l); // Spin locks if we're about to overwrite the buffer. This continues once the data is sent
188187
189188 _tx_buffer->_aucBuffer [_tx_buffer->_iHead ] = uc_data;
190189 _tx_buffer->_iHead = l;
@@ -201,21 +200,29 @@ size_t UARTClass::write( const uint8_t uc_data )
201200
202201void UARTClass::IrqHandler ( void )
203202{
204- uint8_t uc_data ;
205- int ret;
206- ret = uart_poll_in ( CONFIG_UART_CONSOLE_INDEX, &uc_data);
207-
208- while ( ret != - 1 ) {
209- _rx_buffer-> store_char (uc_data) ;
203+ uart_irq_update (CONFIG_UART_CONSOLE_INDEX) ;
204+ // if irq is Receiver Data Available
205+ if ( uart_irq_rx_ready ( CONFIG_UART_CONSOLE_INDEX))
206+ {
207+ uint8_t uc_data;
208+ int ret ;
210209 ret = uart_poll_in (CONFIG_UART_CONSOLE_INDEX, &uc_data);
210+
211+ while ( ret != -1 ) {
212+ _rx_buffer->store_char (uc_data);
213+ ret = uart_poll_in (CONFIG_UART_CONSOLE_INDEX, &uc_data);
214+ }
211215 }
212216
213- // Do we need to keep sending data?
214- if (! uart_irq_tx_ready (CONFIG_UART_CONSOLE_INDEX))
217+ // if irq is Transmitter Holding Register
218+ else if ( uart_irq_tx_ready (CONFIG_UART_CONSOLE_INDEX))
215219 {
216- if (_tx_buffer->_iTail != _tx_buffer->_iHead ) {
217- uart_poll_out (CONFIG_UART_CONSOLE_INDEX, _tx_buffer->_aucBuffer [_tx_buffer->_iTail ]);
218- _tx_buffer->_iTail = (unsigned int )(_tx_buffer->_iTail + 1 ) % UART_BUFFER_SIZE;
220+ if (_tx_buffer->_iTail != _tx_buffer->_iHead )
221+ {
222+ int end = (_tx_buffer->_iTail < _tx_buffer->_iHead ) ? _tx_buffer->_iHead :UART_BUFFER_SIZE;
223+ int l = min (end - _tx_buffer->_iTail , UART_FIFO_SIZE);
224+ uart_fifo_fill (CONFIG_UART_CONSOLE_INDEX, _tx_buffer->_aucBuffer +_tx_buffer->_iTail , l);
225+ _tx_buffer->_iTail = (_tx_buffer->_iTail +l)%UART_BUFFER_SIZE;
219226 }
220227 else
221228 {
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