Adding HBM in cl_sde example

[pyz-creeper]

I want to add HBM in cl_sde example to store large data on FPGA. Inside cl_sde, I believe cl_sde_srm module is responsible for managing on-board data storage, but it uses a streaming manner which does not include data address. Is it possible to pass data address when interacting with the board so that HBMs can be used to store data?

[rcko-aws]

Hello,

One possible way to do this is include a destination address in the 64 bit USER DATA of the H2C descriptor.

See https://github.com/aws/aws-fpga/blob/f2/sdk/apps/virtual-ethernet/doc/SDE_HW_Guide.md

The user data is present on the last data phase on the output of cl_sde_srm

output logic ots_valid,
output logic[511:0] ots_data,
output logic[63:0] ots_keep,
output logic[63:0] ots_user,
output logic ots_last,

Now you can translate this to regular AXI4 transaction and connect to a HBM controller.
The reference designs (cl_dram_hbm_dma and cl_mem_perf) show you how to do that.