How to add new ip to my project?

[pyz-creeper]

I've read the link https://github.com/aws/aws-fpga/tree/f2/hdk#cl-example-hierarchy and I'ver read the docs on how to create CL_TEMPLATE https://awsdocs-fpga-f2.readthedocs-hosted.com/latest/hdk/cl/examples/CL-TEMPLATE/README.html.
But I still don't understand how to add a known IP to my project. I know it has to be under hdk/common/ip, but I don't know what file should I add.
Can you guys provide a step-by-step example on how to add IP to a project?

[czfpga]

Hi @pyz-creeper,

If this is an AMD IP, hdk/common/ip/cl_ip is the correct location. You can open the IP management project through cl_ip.xpr and add the IP to the project. After that, all you need is to add IP's XCI file to your design, you can find to the example in CL_TEMPLATE: https://github.com/aws/aws-fpga/blob/f2/hdk/cl/examples/CL_TEMPLATE/build/scripts/synth_CL_TEMPLATE.tcl#L41-L81.

If this is a 3rd party IP, please add the source code directly to the /design folder. You should be good to go after that.

Hope that helps.

[pyz-creeper]

Hi @czfpga,

I'm trying to add an AMD IP core called mult_gen_0 to my project, but I'm running into a simulation issue. Despite following the steps below, the simulator still reports:

"Module <mult_gen_0> not found while processing module instance ..."

Here’s what I’ve done so far:

1. In the hdk/common/ip/cl_ip directory, I created a script to add the IP. The script is as follows:

   open_project cl_ip.xpr
   create_ip -name mult_gen -vendor xilinx.com -library ip -module_name mult_gen_0
   generate_target all [get_ips mult_gen_0]
   synth_ip [get_ips mult_gen_0]
   save_project
   close_project

2. After running the script, the file `mult_gen_0.xcix` was generated under `hdk/common/ip/cl_ip/cl_ip.srcs/sources_1/ip`. I also checked the  `cl_ip.xpr` file and confirmed that the following XML entries were added:
   ```xml
      <File Path="$PSRCDIR/sources_1/ip/mult_gen_0.xcix">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PSRCDIR/sources_1/ip/mult_gen_0/mult_gen_0.xci">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>

I assumed this meant I needed to manually copy the mult_gen_0.xci file into that directory, so I did.
mult_gen_0.txt
3. I added mult_gen_v12_0_22 at the last line in common_liblists.mk.
4. I ran make regenerate_sim_libs before running my testbench. I use grep to catch the outputs, but nothing is related to "mult_gen".
5. I suspected that maybe the IP wasn't properly registered in the cl_ip.xpr project. So I ran the following TCL script to double-check:

open_project cl_ip.xpr
puts "Available IPs:"
puts [get_ips]
close_project

The script lists mult_gen_0 among the available IPs, which suggests it is in the project.
7. I run make TEST=test_simple_h2c, but got "Module <mult_gen_0> not found while processing module instance ...".

At this point, I’m stuck. It seems that the IP is properly added to the Vivado project, and the source files are in place, but somehow the simulation scripts don’t pick it up. Any ideas on what I might be missing?

Thanks in advance for your help!

[czfpga]

Hi @pyz-creeper,

I assumed this meant I needed to manually copy the mult_gen_0.xci file into that directory, so I did.

Please see my previous response below and you can follow the example code pointed out there to specify the .XCI file location.

after that, all you need is to add IP's XCI file to your design, you can find to the example in CL_TEMPLATE: https://github.com/aws/aws-fpga/blob/f2/hdk/cl/examples/CL_TEMPLATE/build/scripts/synth_CL_TEMPLATE.tcl#L41-L81.

Also, to limit variable, consider turning off the IP's core container option, so IP will generate a XCI not XCIX. After that, make sure you generate the output files for the new IP.

Hope that helps.

[pyz-creeper]

Thanks @czfpga , I now can run my simulations sucessfully. The problem is that I forget export_simulation command when creating my IP.

[czfpga]

Thank you for sharing this information and identifying the root cause. We appreciate your feedback and will use it to improve the document.