Errata updates to v1.3.6

ERRATA.md

@@ -25,4 +25,6 @@
 * PCIM and DMA-PCIS AXI-4 interfaces do not support AxSIZE other than 3'b110 (64B)
 
 ## Known Bugs/Issues
+* F1 CL designs using the v1.3 Shell must treat all clocks within the same group as asynchronous.  For example:  If using clk_main_a1, clk_extra_a1, clk_extra_a2, and clk_extra_a3 they need to be asynchronous.  See [AWS Shell Interface Specification](./hdk/docs/AWS_Shell_Interface_Specification.md)
+* The API fpga-load-local-image, has a bug in the error messaging which does not indicate a PCI ID mismatch occurred.  The PCI ID’s listed in the AFI manifest when an AFI is submitted to the CreateFpgaImage api (Vendor ID, Device ID, SubSystem ID, or SubSystem Vendor ID) should match the actual values in the submitted DCP. If there is a mismatch between the manifest IDs and the actual device ID, calling fpga-load-local-image on the AFI should report back load-failed (error 7), with a sub-error indicating there is a device ID mismatch. However, fpga-load-local-image does not report the sub-error, leaving no description as to why the load has failed.  Until this issue has been fixed, if you experience an AFI load-failed when loading the AFI,  double check the device IDs in the submitted manifest match the device IDs in the DCP.
 

hdk/docs/AWS_Shell_Interface_Specification.md

@@ -273,7 +273,12 @@ The clocks within each group are generated from a common VCO/PLL, which restrict
 
 The maximum frequency on clk_main_a0 is 250MHz.
 
-Clocks within a gruop are phase aligned.
+clk\_extra\_* clocks within a group are phase aligned:
+  - clk_xtra_a1, clk_xtra_a2, clk_xtra_a3
+  - clk_xtra_b0, clk_xtra_b1
+  - clk_xtra_c0, clk_xtra_c1
+
+Paths between all other clocks are required to be treated as asynchronous.
 
 ** *Note: The Developer must NOT assume frequency lock or alignment between clocks from different groups, even if they are set for same frequencies * **