Pynq-Z2 (Starting from 2021-2022)

Xilinx 2021.2

• SoC_5_HelloWorld..... => Vivado Hardware with only Zynq Processing System and Vitis project running "Hello World" C Application

MiniZED

MiniZED Examples's by Vincent Claes Xilinx Vivado 2018.2

• GPIO PL => AXI GPIO + C Application
• GPIO PS => GPIO using only the PS; MIO Interface
• GPIO_PS_INTR => GPIO using only the PS; MIO Interface, using Interrupts
• HelloWorldPS => Printing Hello World (PS)
• GPIO_PMOD_7S => AXI GPIO Example to drive a 7 Segment display from PS (PMOD Connector)
• vhdlnoclock.vhd => VHDL file for generating an internal clock, for VHDL exercises without using a clock from ZYNQ PS
• Dobbelsteen_vhdl => Example project in VHDL for PMOD Dice PCB
• Dobbelsteen_1.0_axi_ip => Example Custom AXI IP Block
• Dobbelsteen_ip_app => Example project integrating the custom Dice AXI IP Block [Dobbelsteen_1.0_axi_ip]
• ZYNQ_PS_INPUT => Reading values from the Serial Terminal as input [ZYBO BOARD EXAMPLE]
• ZYNQ BRAM => Example Project for Implementing AXI BRAM Controller in Xiling ZYNQ FPGA