EDAC/i10nm: Add Intel Emerald Rapids server support

Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2165650
Tested: tested with the EMR machine we have in the lab

commit e4b2bc6
Author: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Date:   Fri Jan 13 11:28:00 2023 +0800

    EDAC/i10nm: Add Intel Emerald Rapids server support

    The Emerald Rapids CPU model uses similar memory controller registers
    as Sapphire Rapids server. Add Emerald Rapids CPU model number ID for
    EDAC support.

    Tested-by: Li Zhang <li4.zhang@intel.com>
    Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
    Signed-off-by: Tony Luck <tony.luck@intel.com>
    Link: https://lore.kernel.org/all/20230113032802.41752-1-qiuxu.zhuo@intel.com

Signed-off-by: Aristeu Rozanski <arozansk@redhat.com>

Author: aristeu

drivers/edac/i10nm_base.c

@@ -529,6 +529,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = {
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X,		X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_D,		X86_STEPPINGS(0x0, 0xf), &i10nm_cfg1),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),
+	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),
 	{}
 };
 MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);