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MrVanShawn Guo
MrVan
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Shawn Guo
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soc: imx: add i.MX93 SRC power domain driver
Support controlling power domain managed by System Reset Controller(SRC). Current supported power domain is mediamix power domain. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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‎drivers/soc/imx/Kconfig‎

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@@ -20,4 +20,12 @@ config SOC_IMX8M
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support, it will provide the SoC info like SoC family,
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ID and revision etc.
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config SOC_IMX9
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tristate "i.MX9 SoC family support"
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depends on ARCH_MXC || COMPILE_TEST
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default ARCH_MXC && ARM64
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select SOC_BUS
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help
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If you say yes here, you get support for the NXP i.MX9 family
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endmenu

‎drivers/soc/imx/Makefile‎

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@@ -7,3 +7,4 @@ obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
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obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
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obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o
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obj-$(CONFIG_SOC_IMX8M) += imx8mp-blk-ctrl.o
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obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o

‎drivers/soc/imx/imx93-pd.c‎

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2022 NXP
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/of_device.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#define MIX_SLICE_SW_CTRL_OFF 0x20
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#define SLICE_SW_CTRL_PSW_CTRL_OFF_MASK BIT(4)
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#define SLICE_SW_CTRL_PDN_SOFT_MASK BIT(31)
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#define MIX_FUNC_STAT_OFF 0xB4
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#define FUNC_STAT_PSW_STAT_MASK BIT(0)
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#define FUNC_STAT_RST_STAT_MASK BIT(2)
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#define FUNC_STAT_ISO_STAT_MASK BIT(4)
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struct imx93_power_domain {
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struct generic_pm_domain genpd;
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struct device *dev;
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void __iomem *addr;
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struct clk_bulk_data *clks;
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int num_clks;
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bool init_off;
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};
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#define to_imx93_pd(_genpd) container_of(_genpd, struct imx93_power_domain, genpd)
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static int imx93_pd_on(struct generic_pm_domain *genpd)
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{
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struct imx93_power_domain *domain = to_imx93_pd(genpd);
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void __iomem *addr = domain->addr;
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u32 val;
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int ret;
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ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
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if (ret) {
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dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name);
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return ret;
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}
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val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
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val &= ~SLICE_SW_CTRL_PDN_SOFT_MASK;
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writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
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ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
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!(val & FUNC_STAT_ISO_STAT_MASK), 1, 10000);
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if (ret) {
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dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val);
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return ret;
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}
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return 0;
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}
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static int imx93_pd_off(struct generic_pm_domain *genpd)
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{
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struct imx93_power_domain *domain = to_imx93_pd(genpd);
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void __iomem *addr = domain->addr;
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int ret;
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u32 val;
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/* Power off MIX */
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val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
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val |= SLICE_SW_CTRL_PDN_SOFT_MASK;
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writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
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ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
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val & FUNC_STAT_PSW_STAT_MASK, 1, 1000);
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if (ret) {
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dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val);
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return ret;
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}
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clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
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return 0;
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};
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static int imx93_pd_remove(struct platform_device *pdev)
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{
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struct imx93_power_domain *domain = platform_get_drvdata(pdev);
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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if (!domain->init_off)
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clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
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of_genpd_del_provider(np);
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pm_genpd_remove(&domain->genpd);
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return 0;
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}
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static int imx93_pd_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct imx93_power_domain *domain;
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int ret;
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domain = devm_kzalloc(dev, sizeof(*domain), GFP_KERNEL);
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if (!domain)
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return -ENOMEM;
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domain->addr = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(domain->addr))
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return PTR_ERR(domain->addr);
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domain->num_clks = devm_clk_bulk_get_all(dev, &domain->clks);
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if (domain->num_clks < 0)
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return dev_err_probe(dev, domain->num_clks, "Failed to get domain's clocks\n");
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domain->genpd.name = dev_name(dev);
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domain->genpd.power_off = imx93_pd_off;
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domain->genpd.power_on = imx93_pd_on;
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domain->dev = dev;
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domain->init_off = readl(domain->addr + MIX_FUNC_STAT_OFF) & FUNC_STAT_ISO_STAT_MASK;
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/* Just to sync the status of hardware */
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if (!domain->init_off) {
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ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
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if (ret) {
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dev_err(domain->dev, "failed to enable clocks for domain: %s\n",
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domain->genpd.name);
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return ret;
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}
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}
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ret = pm_genpd_init(&domain->genpd, NULL, domain->init_off);
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if (ret)
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return ret;
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platform_set_drvdata(pdev, domain);
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return of_genpd_add_provider_simple(np, &domain->genpd);
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}
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static const struct of_device_id imx93_pd_ids[] = {
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{ .compatible = "fsl,imx93-src-slice" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, imx93_pd_ids);
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static struct platform_driver imx93_power_domain_driver = {
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.driver = {
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.name = "imx93_power_domain",
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.owner = THIS_MODULE,
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.of_match_table = imx93_pd_ids,
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},
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.probe = imx93_pd_probe,
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.remove = imx93_pd_remove,
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};
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module_platform_driver(imx93_power_domain_driver);
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MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
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MODULE_DESCRIPTION("NXP i.MX93 power domain driver");
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MODULE_LICENSE("GPL");

‎drivers/soc/imx/imx93-src.c‎

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2022 NXP
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*/
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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static int imx93_src_probe(struct platform_device *pdev)
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{
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return devm_of_platform_populate(&pdev->dev);
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}
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static const struct of_device_id imx93_src_ids[] = {
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{ .compatible = "fsl,imx93-src" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, imx93_src_ids);
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static struct platform_driver imx93_src_driver = {
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.driver = {
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.name = "imx93_src",
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.owner = THIS_MODULE,
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.of_match_table = imx93_src_ids,
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},
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.probe = imx93_src_probe,
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};
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module_platform_driver(imx93_src_driver);
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MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
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MODULE_DESCRIPTION("NXP i.MX93 src driver");
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MODULE_LICENSE("GPL");

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