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Zhaoxiong Lvsuperna9999
Zhaoxiong Lv
authored and
superna9999
committed
drm/panel: jd9365da: Support for kd101ne3-40ti MIPI-DSI panel
The K&d kd101ne3-40ti is a 10.1" WXGA TFT-LCD panel, use jd9365da controller,which fits in nicely with the existing panel-jadard-jd9365da-h3 driver.Hence,we add a new compatible with panel specific config. Although they have the same control IC, the two panels are different, and the timing will be slightly different, so we added some variables in struct jadard_panel_desc to control the timing. Signed-off-by: Zhaoxiong Lv <lvzhaoxiong@huaqin.corp-partner.google.com> Acked-by: Jessica Zhang <quic_jesszhan@quicinc.com> Link: https://lore.kernel.org/r/20240624141926.5250-5-lvzhaoxiong@huaqin.corp-partner.google.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240624141926.5250-5-lvzhaoxiong@huaqin.corp-partner.google.com
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‎drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c‎

Lines changed: 277 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,15 @@ struct jadard_panel_desc {
2727
enum mipi_dsi_pixel_format format;
2828
int (*init)(struct jadard *jadard);
2929
u32 num_init_cmds;
30+
bool lp11_before_reset;
31+
bool reset_before_power_off_vcioo;
32+
unsigned int vcioo_to_lp11_delay_ms;
33+
unsigned int lp11_to_reset_delay_ms;
34+
unsigned int exit_sleep_to_display_on_delay_ms;
35+
unsigned int display_on_delay_ms;
36+
unsigned int backlight_off_to_display_off_delay_ms;
37+
unsigned int display_off_to_enter_sleep_delay_ms;
38+
unsigned int enter_sleep_to_reset_down_delay_ms;
3039
};
3140

3241
struct jadard {
@@ -53,8 +62,14 @@ static int jadard_enable(struct drm_panel *panel)
5362

5463
mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
5564

65+
if (jadard->desc->exit_sleep_to_display_on_delay_ms)
66+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->exit_sleep_to_display_on_delay_ms);
67+
5668
mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
5769

70+
if (jadard->desc->display_on_delay_ms)
71+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->display_on_delay_ms);
72+
5873
return dsi_ctx.accum_err;
5974
}
6075

@@ -63,10 +78,19 @@ static int jadard_disable(struct drm_panel *panel)
6378
struct jadard *jadard = panel_to_jadard(panel);
6479
struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
6580

81+
if (jadard->desc->backlight_off_to_display_off_delay_ms)
82+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->backlight_off_to_display_off_delay_ms);
83+
6684
mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
6785

86+
if (jadard->desc->display_off_to_enter_sleep_delay_ms)
87+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->display_off_to_enter_sleep_delay_ms);
88+
6889
mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
6990

91+
if (jadard->desc->enter_sleep_to_reset_down_delay_ms)
92+
mipi_dsi_msleep(&dsi_ctx, jadard->desc->enter_sleep_to_reset_down_delay_ms);
93+
7094
return dsi_ctx.accum_err;
7195
}
7296

@@ -83,6 +107,18 @@ static int jadard_prepare(struct drm_panel *panel)
83107
if (ret)
84108
return ret;
85109

110+
if (jadard->desc->vcioo_to_lp11_delay_ms)
111+
msleep(jadard->desc->vcioo_to_lp11_delay_ms);
112+
113+
if (jadard->desc->lp11_before_reset) {
114+
ret = mipi_dsi_dcs_nop(jadard->dsi);
115+
if (ret)
116+
return ret;
117+
}
118+
119+
if (jadard->desc->lp11_to_reset_delay_ms)
120+
msleep(jadard->desc->lp11_to_reset_delay_ms);
121+
86122
gpiod_set_value(jadard->reset, 1);
87123
msleep(5);
88124

@@ -106,6 +142,12 @@ static int jadard_unprepare(struct drm_panel *panel)
106142
gpiod_set_value(jadard->reset, 1);
107143
msleep(120);
108144

145+
if (jadard->desc->reset_before_power_off_vcioo) {
146+
gpiod_set_value(jadard->reset, 0);
147+
148+
usleep_range(1000, 2000);
149+
}
150+
109151
regulator_disable(jadard->vdd);
110152
regulator_disable(jadard->vccio);
111153

@@ -569,6 +611,237 @@ static const struct jadard_panel_desc cz101b4001_desc = {
569611
.init = cz101b4001_init_cmds,
570612
};
571613

614+
static int kingdisplay_kd101ne3_init_cmds(struct jadard *jadard)
615+
{
616+
struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
617+
618+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x00);
619+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0x93);
620+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, 0x65);
621+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe3, 0xf8);
622+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x03);
623+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x01);
624+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74);
625+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
626+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xc7);
627+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x01);
628+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00);
629+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xc7);
630+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x01);
631+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfe);
632+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19);
633+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x28);
634+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05);
635+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
636+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x12);
637+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x7e);
638+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff);
639+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff);
640+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x7f);
641+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
642+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xa0);
643+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e);
644+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0b);
645+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
646+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x6a);
647+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a);
648+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x2e);
649+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x1a);
650+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x15);
651+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x7f);
652+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x61);
653+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x50);
654+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x43);
655+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x3f);
656+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x32);
657+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x35);
658+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x1f);
659+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x38);
660+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x36);
661+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x36);
662+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x54);
663+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x42);
664+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x48);
665+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x39);
666+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x34);
667+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x26);
668+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x14);
669+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02);
670+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7f);
671+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x61);
672+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x50);
673+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x43);
674+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x3f);
675+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x32);
676+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x35);
677+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x1f);
678+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x38);
679+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x36);
680+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x36);
681+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x54);
682+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x42);
683+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x48);
684+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x39);
685+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x34);
686+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x26);
687+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x14);
688+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x02);
689+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x02);
690+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x52);
691+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x5f);
692+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x5f);
693+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x50);
694+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x77);
695+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x57);
696+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x5f);
697+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x4e);
698+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x4c);
699+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x5f);
700+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x4a);
701+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x48);
702+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x5f);
703+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x46);
704+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x44);
705+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x40);
706+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x5f);
707+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x5f);
708+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x5f);
709+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x5f);
710+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x5f);
711+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x5f);
712+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x53);
713+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x5f);
714+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x5f);
715+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x51);
716+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x77);
717+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x57);
718+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x5f);
719+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x4f);
720+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x4d);
721+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x5f);
722+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x4b);
723+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x49);
724+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x5f);
725+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x47);
726+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x45);
727+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x41);
728+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x5f);
729+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x5f);
730+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x5f);
731+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x5f);
732+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x5f);
733+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x5f);
734+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2c, 0x13);
735+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x1f);
736+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x1f);
737+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x01);
738+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x17);
739+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x17);
740+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x1f);
741+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x0d);
742+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x0f);
743+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x1f);
744+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x05);
745+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x07);
746+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x1f);
747+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x09);
748+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x0b);
749+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x11);
750+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x1f);
751+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0x1f);
752+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0x1f);
753+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x1f);
754+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x1f);
755+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1f);
756+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x12);
757+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1f);
758+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x1f);
759+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x00);
760+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x17);
761+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x17);
762+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x1f);
763+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x0c);
764+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x0e);
765+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x1f);
766+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x04);
767+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x06);
768+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x1f);
769+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0x08);
770+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x0a);
771+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x10);
772+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x1f);
773+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x1f);
774+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x1f);
775+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x1f);
776+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x1f);
777+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1f);
778+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
779+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x10);
780+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x06);
781+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x40);
782+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x00);
783+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x00);
784+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x40);
785+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x03);
786+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x04);
787+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x6c);
788+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6c);
789+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x75);
790+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x08);
791+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0xb4);
792+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x08);
793+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x6c);
794+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x6c);
795+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x0c);
796+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);
797+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x00);
798+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88);
799+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xbb);
800+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00);
801+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x05);
802+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2a);
803+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x04);
804+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0e);
805+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xb3);
806+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x61);
807+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x48);
808+
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x00);
809+
810+
return dsi_ctx.accum_err;
811+
};
812+
813+
static const struct jadard_panel_desc kingdisplay_kd101ne3_40ti_desc = {
814+
.mode = {
815+
.clock = (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000,
816+
817+
.hdisplay = 800,
818+
.hsync_start = 800 + 24,
819+
.hsync_end = 800 + 24 + 24,
820+
.htotal = 800 + 24 + 24 + 24,
821+
822+
.vdisplay = 1280,
823+
.vsync_start = 1280 + 30,
824+
.vsync_end = 1280 + 30 + 4,
825+
.vtotal = 1280 + 30 + 4 + 8,
826+
827+
.width_mm = 135,
828+
.height_mm = 216,
829+
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
830+
},
831+
.lanes = 4,
832+
.format = MIPI_DSI_FMT_RGB888,
833+
.init = kingdisplay_kd101ne3_init_cmds,
834+
.lp11_before_reset = true,
835+
.reset_before_power_off_vcioo = true,
836+
.vcioo_to_lp11_delay_ms = 5,
837+
.lp11_to_reset_delay_ms = 10,
838+
.exit_sleep_to_display_on_delay_ms = 120,
839+
.display_on_delay_ms = 20,
840+
.backlight_off_to_display_off_delay_ms = 100,
841+
.display_off_to_enter_sleep_delay_ms = 50,
842+
.enter_sleep_to_reset_down_delay_ms = 100,
843+
};
844+
572845
static int jadard_dsi_probe(struct mipi_dsi_device *dsi)
573846
{
574847
struct device *dev = &dsi->dev;
@@ -637,6 +910,10 @@ static const struct of_device_id jadard_of_match[] = {
637910
.compatible = "chongzhou,cz101b4001",
638911
.data = &cz101b4001_desc
639912
},
913+
{
914+
.compatible = "kingdisplay,kd101ne3-40ti",
915+
.data = &kingdisplay_kd101ne3_40ti_desc
916+
},
640917
{
641918
.compatible = "radxa,display-10hd-ad001",
642919
.data = &cz101b4001_desc

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