2929#define LABIBB_STATUS1_VREG_OK_BIT BIT(7)
3030#define LABIBB_CONTROL_ENABLE BIT(7)
3131
32+ #define REG_LABIBB_PD_CTL 0x47
33+ #define LAB_PD_CTL_MASK GENMASK(1, 0)
34+ #define IBB_PD_CTL_MASK (BIT(0) | BIT(7))
35+ #define LAB_PD_CTL_STRONG_PULL BIT(0)
36+ #define IBB_PD_CTL_HALF_STRENGTH BIT(0)
37+ #define IBB_PD_CTL_EN BIT(7)
38+
3239#define REG_LABIBB_CURRENT_LIMIT 0x4b
3340 #define LAB_CURRENT_LIMIT_MASK GENMASK(2, 0)
3441 #define IBB_CURRENT_LIMIT_MASK GENMASK(4, 0)
3542 #define LAB_CURRENT_LIMIT_OVERRIDE_EN BIT(3)
3643 #define LABIBB_CURRENT_LIMIT_EN BIT(7)
3744
45+ #define REG_IBB_PWRUP_PWRDN_CTL_1 0x58
46+ #define IBB_CTL_1_DISCHARGE_EN BIT(2)
47+
48+ #define REG_LABIBB_SOFT_START_CTL 0x5f
3849#define REG_LABIBB_SEC_ACCESS 0xd0
3950 #define LABIBB_SEC_UNLOCK_CODE 0xa5
4051
@@ -60,6 +71,8 @@ struct labibb_regulator {
6071 struct labibb_current_limits uA_limits ;
6172 u16 base ;
6273 u8 type ;
74+ u8 dischg_sel ;
75+ u8 soft_start_sel ;
6376};
6477
6578struct labibb_regulator_data {
@@ -120,6 +133,70 @@ static int qcom_labibb_get_current_limit(struct regulator_dev *rdev)
120133 return (cur_step * lim -> uA_step ) + lim -> uA_min ;
121134}
122135
136+ static int qcom_labibb_set_soft_start (struct regulator_dev * rdev )
137+ {
138+ struct labibb_regulator * vreg = rdev_get_drvdata (rdev );
139+ u32 val = 0 ;
140+
141+ if (vreg -> type == QCOM_IBB_TYPE )
142+ val = vreg -> dischg_sel ;
143+ else
144+ val = vreg -> soft_start_sel ;
145+
146+ return regmap_write (rdev -> regmap , rdev -> desc -> soft_start_reg , val );
147+ }
148+
149+ static int qcom_labibb_get_table_sel (const int * table , int sz , u32 value )
150+ {
151+ int i ;
152+
153+ for (i = 0 ; i < sz ; i ++ )
154+ if (table [i ] == value )
155+ return i ;
156+ return - EINVAL ;
157+ }
158+
159+ /* IBB discharge resistor values in KOhms */
160+ static const int dischg_resistor_values [] = { 300 , 64 , 32 , 16 };
161+
162+ /* Soft start time in microseconds */
163+ static const int soft_start_values [] = { 200 , 400 , 600 , 800 };
164+
165+ static int qcom_labibb_of_parse_cb (struct device_node * np ,
166+ const struct regulator_desc * desc ,
167+ struct regulator_config * config )
168+ {
169+ struct labibb_regulator * vreg = config -> driver_data ;
170+ u32 dischg_kohms , soft_start_time ;
171+ int ret ;
172+
173+ ret = of_property_read_u32 (np , "qcom,discharge-resistor-kohms" ,
174+ & dischg_kohms );
175+ if (ret )
176+ dischg_kohms = 300 ;
177+
178+ ret = qcom_labibb_get_table_sel (dischg_resistor_values ,
179+ ARRAY_SIZE (dischg_resistor_values ),
180+ dischg_kohms );
181+ if (ret < 0 )
182+ return ret ;
183+ vreg -> dischg_sel = (u8 )ret ;
184+
185+ ret = of_property_read_u32 (np , "qcom,soft-start-us" ,
186+ & soft_start_time );
187+ if (ret )
188+ soft_start_time = 200 ;
189+
190+ ret = qcom_labibb_get_table_sel (soft_start_values ,
191+ ARRAY_SIZE (soft_start_values ),
192+ soft_start_time );
193+ if (ret < 0 )
194+ return ret ;
195+ vreg -> soft_start_sel = (u8 )ret ;
196+
197+ return 0 ;
198+ }
199+
123200static const struct regulator_ops qcom_labibb_ops = {
124201 .enable = regulator_enable_regmap ,
125202 .disable = regulator_disable_regmap ,
@@ -128,8 +205,11 @@ static const struct regulator_ops qcom_labibb_ops = {
128205 .get_voltage_sel = regulator_get_voltage_sel_regmap ,
129206 .list_voltage = regulator_list_voltage_linear ,
130207 .map_voltage = regulator_map_voltage_linear ,
208+ .set_active_discharge = regulator_set_active_discharge_regmap ,
209+ .set_pull_down = regulator_set_pull_down_regmap ,
131210 .set_current_limit = qcom_labibb_set_current_limit ,
132211 .get_current_limit = qcom_labibb_get_current_limit ,
212+ .set_soft_start = qcom_labibb_set_soft_start ,
133213};
134214
135215static const struct regulator_desc pmi8998_lab_desc = {
@@ -138,6 +218,10 @@ static const struct regulator_desc pmi8998_lab_desc = {
138218 .enable_val = LABIBB_CONTROL_ENABLE ,
139219 .enable_time = LAB_ENABLE_TIME ,
140220 .poll_enabled_time = LABIBB_POLL_ENABLED_TIME ,
221+ .soft_start_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_SOFT_START_CTL ),
222+ .pull_down_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_PD_CTL ),
223+ .pull_down_mask = LAB_PD_CTL_MASK ,
224+ .pull_down_val_on = LAB_PD_CTL_STRONG_PULL ,
141225 .vsel_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_VOLTAGE ),
142226 .vsel_mask = LAB_VOLTAGE_SET_MASK ,
143227 .apply_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_VOLTAGE ),
@@ -152,6 +236,7 @@ static const struct regulator_desc pmi8998_lab_desc = {
152236 .uV_step = 100000 ,
153237 .n_voltages = 16 ,
154238 .ops = & qcom_labibb_ops ,
239+ .of_parse_cb = qcom_labibb_of_parse_cb ,
155240};
156241
157242static const struct regulator_desc pmi8998_ibb_desc = {
@@ -160,6 +245,14 @@ static const struct regulator_desc pmi8998_ibb_desc = {
160245 .enable_val = LABIBB_CONTROL_ENABLE ,
161246 .enable_time = IBB_ENABLE_TIME ,
162247 .poll_enabled_time = LABIBB_POLL_ENABLED_TIME ,
248+ .soft_start_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_SOFT_START_CTL ),
249+ .active_discharge_off = 0 ,
250+ .active_discharge_on = IBB_CTL_1_DISCHARGE_EN ,
251+ .active_discharge_mask = IBB_CTL_1_DISCHARGE_EN ,
252+ .active_discharge_reg = (PMI8998_IBB_REG_BASE + REG_IBB_PWRUP_PWRDN_CTL_1 ),
253+ .pull_down_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_PD_CTL ),
254+ .pull_down_mask = IBB_PD_CTL_MASK ,
255+ .pull_down_val_on = IBB_PD_CTL_HALF_STRENGTH | IBB_PD_CTL_EN ,
163256 .vsel_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_VOLTAGE ),
164257 .vsel_mask = IBB_VOLTAGE_SET_MASK ,
165258 .apply_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_VOLTAGE ),
@@ -174,6 +267,7 @@ static const struct regulator_desc pmi8998_ibb_desc = {
174267 .uV_step = 100000 ,
175268 .n_voltages = 64 ,
176269 .ops = & qcom_labibb_ops ,
270+ .of_parse_cb = qcom_labibb_of_parse_cb ,
177271};
178272
179273static const struct labibb_regulator_data pmi8998_labibb_data [] = {
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