2828#define MAX_RATE_EXPONENT 0x0FULL
2929#define MAX_RATE_MANTISSA 0xFFULL
3030
31- #define CN10K_MAX_BURST_MANTISSA 0x7FFFULL
32- #define CN10K_MAX_BURST_SIZE 8453888ULL
33-
3431/* Bitfields in NIX_TLX_PIR register */
3532#define TLX_RATE_MANTISSA GENMASK_ULL(8, 1)
3633#define TLX_RATE_EXPONENT GENMASK_ULL(12, 9)
3734#define TLX_RATE_DIVIDER_EXPONENT GENMASK_ULL(16, 13)
3835#define TLX_BURST_MANTISSA GENMASK_ULL(36, 29)
3936#define TLX_BURST_EXPONENT GENMASK_ULL(40, 37)
4037
41- #define CN10K_TLX_BURST_MANTISSA GENMASK_ULL(43, 29)
42- #define CN10K_TLX_BURST_EXPONENT GENMASK_ULL(47, 44)
43-
4438struct otx2_tc_flow_stats {
4539 u64 bytes ;
4640 u64 pkts ;
@@ -83,42 +77,33 @@ int otx2_tc_alloc_ent_bitmap(struct otx2_nic *nic)
8377}
8478EXPORT_SYMBOL (otx2_tc_alloc_ent_bitmap );
8579
86- static void otx2_get_egress_burst_cfg (struct otx2_nic * nic , u32 burst ,
87- u32 * burst_exp , u32 * burst_mantissa )
80+ static void otx2_get_egress_burst_cfg (u32 burst , u32 * burst_exp ,
81+ u32 * burst_mantissa )
8882{
89- int max_burst , max_mantissa ;
9083 unsigned int tmp ;
9184
92- if (is_dev_otx2 (nic -> pdev )) {
93- max_burst = MAX_BURST_SIZE ;
94- max_mantissa = MAX_BURST_MANTISSA ;
95- } else {
96- max_burst = CN10K_MAX_BURST_SIZE ;
97- max_mantissa = CN10K_MAX_BURST_MANTISSA ;
98- }
99-
10085 /* Burst is calculated as
10186 * ((256 + BURST_MANTISSA) << (1 + BURST_EXPONENT)) / 256
10287 * Max supported burst size is 130,816 bytes.
10388 */
104- burst = min_t (u32 , burst , max_burst );
89+ burst = min_t (u32 , burst , MAX_BURST_SIZE );
10590 if (burst ) {
10691 * burst_exp = ilog2 (burst ) ? ilog2 (burst ) - 1 : 0 ;
10792 tmp = burst - rounddown_pow_of_two (burst );
108- if (burst < max_mantissa )
93+ if (burst < MAX_BURST_MANTISSA )
10994 * burst_mantissa = tmp * 2 ;
11095 else
11196 * burst_mantissa = tmp / (1ULL << (* burst_exp - 7 ));
11297 } else {
11398 * burst_exp = MAX_BURST_EXPONENT ;
114- * burst_mantissa = max_mantissa ;
99+ * burst_mantissa = MAX_BURST_MANTISSA ;
115100 }
116101}
117102
118- static void otx2_get_egress_rate_cfg (u64 maxrate , u32 * exp ,
103+ static void otx2_get_egress_rate_cfg (u32 maxrate , u32 * exp ,
119104 u32 * mantissa , u32 * div_exp )
120105{
121- u64 tmp ;
106+ unsigned int tmp ;
122107
123108 /* Rate calculation by hardware
124109 *
@@ -147,44 +132,21 @@ static void otx2_get_egress_rate_cfg(u64 maxrate, u32 *exp,
147132 }
148133}
149134
150- static u64 otx2_get_txschq_rate_regval (struct otx2_nic * nic ,
151- u64 maxrate , u32 burst )
152- {
153- u32 burst_exp , burst_mantissa ;
154- u32 exp , mantissa , div_exp ;
155- u64 regval = 0 ;
156-
157- /* Get exponent and mantissa values from the desired rate */
158- otx2_get_egress_burst_cfg (nic , burst , & burst_exp , & burst_mantissa );
159- otx2_get_egress_rate_cfg (maxrate , & exp , & mantissa , & div_exp );
160-
161- if (is_dev_otx2 (nic -> pdev )) {
162- regval = FIELD_PREP (TLX_BURST_EXPONENT , (u64 )burst_exp ) |
163- FIELD_PREP (TLX_BURST_MANTISSA , (u64 )burst_mantissa ) |
164- FIELD_PREP (TLX_RATE_DIVIDER_EXPONENT , div_exp ) |
165- FIELD_PREP (TLX_RATE_EXPONENT , exp ) |
166- FIELD_PREP (TLX_RATE_MANTISSA , mantissa ) | BIT_ULL (0 );
167- } else {
168- regval = FIELD_PREP (CN10K_TLX_BURST_EXPONENT , (u64 )burst_exp ) |
169- FIELD_PREP (CN10K_TLX_BURST_MANTISSA , (u64 )burst_mantissa ) |
170- FIELD_PREP (TLX_RATE_DIVIDER_EXPONENT , div_exp ) |
171- FIELD_PREP (TLX_RATE_EXPONENT , exp ) |
172- FIELD_PREP (TLX_RATE_MANTISSA , mantissa ) | BIT_ULL (0 );
173- }
174-
175- return regval ;
176- }
177-
178- static int otx2_set_matchall_egress_rate (struct otx2_nic * nic ,
179- u32 burst , u64 maxrate )
135+ static int otx2_set_matchall_egress_rate (struct otx2_nic * nic , u32 burst , u32 maxrate )
180136{
181137 struct otx2_hw * hw = & nic -> hw ;
182138 struct nix_txschq_config * req ;
139+ u32 burst_exp , burst_mantissa ;
140+ u32 exp , mantissa , div_exp ;
183141 int txschq , err ;
184142
185143 /* All SQs share the same TL4, so pick the first scheduler */
186144 txschq = hw -> txschq_list [NIX_TXSCH_LVL_TL4 ][0 ];
187145
146+ /* Get exponent and mantissa values from the desired rate */
147+ otx2_get_egress_burst_cfg (burst , & burst_exp , & burst_mantissa );
148+ otx2_get_egress_rate_cfg (maxrate , & exp , & mantissa , & div_exp );
149+
188150 mutex_lock (& nic -> mbox .lock );
189151 req = otx2_mbox_alloc_msg_nix_txschq_cfg (& nic -> mbox );
190152 if (!req ) {
@@ -195,7 +157,11 @@ static int otx2_set_matchall_egress_rate(struct otx2_nic *nic,
195157 req -> lvl = NIX_TXSCH_LVL_TL4 ;
196158 req -> num_regs = 1 ;
197159 req -> reg [0 ] = NIX_AF_TL4X_PIR (txschq );
198- req -> regval [0 ] = otx2_get_txschq_rate_regval (nic , maxrate , burst );
160+ req -> regval [0 ] = FIELD_PREP (TLX_BURST_EXPONENT , burst_exp ) |
161+ FIELD_PREP (TLX_BURST_MANTISSA , burst_mantissa ) |
162+ FIELD_PREP (TLX_RATE_DIVIDER_EXPONENT , div_exp ) |
163+ FIELD_PREP (TLX_RATE_EXPONENT , exp ) |
164+ FIELD_PREP (TLX_RATE_MANTISSA , mantissa ) | BIT_ULL (0 );
199165
200166 err = otx2_sync_mbox_msg (& nic -> mbox );
201167 mutex_unlock (& nic -> mbox .lock );
@@ -264,7 +230,7 @@ static int otx2_tc_egress_matchall_install(struct otx2_nic *nic,
264230 struct netlink_ext_ack * extack = cls -> common .extack ;
265231 struct flow_action * actions = & cls -> rule -> action ;
266232 struct flow_action_entry * entry ;
267- u64 rate ;
233+ u32 rate ;
268234 int err ;
269235
270236 err = otx2_tc_validate_flow (nic , actions , extack );
@@ -290,7 +256,7 @@ static int otx2_tc_egress_matchall_install(struct otx2_nic *nic,
290256 }
291257 /* Convert bytes per second to Mbps */
292258 rate = entry -> police .rate_bytes_ps * 8 ;
293- rate = max_t (u64 , rate / 1000000 , 1 );
259+ rate = max_t (u32 , rate / 1000000 , 1 );
294260 err = otx2_set_matchall_egress_rate (nic , entry -> police .burst , rate );
295261 if (err )
296262 return err ;
@@ -648,27 +614,21 @@ static int otx2_tc_prepare_flow(struct otx2_nic *nic, struct otx2_tc_flow *node,
648614
649615 flow_spec -> dport = match .key -> dst ;
650616 flow_mask -> dport = match .mask -> dst ;
651-
652- if (flow_mask -> dport ) {
653- if (ip_proto == IPPROTO_UDP )
654- req -> features |= BIT_ULL (NPC_DPORT_UDP );
655- else if (ip_proto == IPPROTO_TCP )
656- req -> features |= BIT_ULL (NPC_DPORT_TCP );
657- else if (ip_proto == IPPROTO_SCTP )
658- req -> features |= BIT_ULL (NPC_DPORT_SCTP );
659- }
617+ if (ip_proto == IPPROTO_UDP )
618+ req -> features |= BIT_ULL (NPC_DPORT_UDP );
619+ else if (ip_proto == IPPROTO_TCP )
620+ req -> features |= BIT_ULL (NPC_DPORT_TCP );
621+ else if (ip_proto == IPPROTO_SCTP )
622+ req -> features |= BIT_ULL (NPC_DPORT_SCTP );
660623
661624 flow_spec -> sport = match .key -> src ;
662625 flow_mask -> sport = match .mask -> src ;
663-
664- if (flow_mask -> sport ) {
665- if (ip_proto == IPPROTO_UDP )
666- req -> features |= BIT_ULL (NPC_SPORT_UDP );
667- else if (ip_proto == IPPROTO_TCP )
668- req -> features |= BIT_ULL (NPC_SPORT_TCP );
669- else if (ip_proto == IPPROTO_SCTP )
670- req -> features |= BIT_ULL (NPC_SPORT_SCTP );
671- }
626+ if (ip_proto == IPPROTO_UDP )
627+ req -> features |= BIT_ULL (NPC_SPORT_UDP );
628+ else if (ip_proto == IPPROTO_TCP )
629+ req -> features |= BIT_ULL (NPC_SPORT_TCP );
630+ else if (ip_proto == IPPROTO_SCTP )
631+ req -> features |= BIT_ULL (NPC_SPORT_SCTP );
672632 }
673633
674634 return otx2_tc_parse_actions (nic , & rule -> action , req , f , node );
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