@@ -3518,7 +3518,7 @@ void amdgpu_dm_update_connector_after_detect(
35183518 aconnector -> dc_sink = sink ;
35193519 dc_sink_retain (aconnector -> dc_sink );
35203520 amdgpu_dm_update_freesync_caps (connector ,
3521- aconnector -> edid );
3521+ aconnector -> drm_edid );
35223522 } else {
35233523 amdgpu_dm_update_freesync_caps (connector , NULL );
35243524 if (!aconnector -> dc_sink ) {
@@ -3577,18 +3577,19 @@ void amdgpu_dm_update_connector_after_detect(
35773577 aconnector -> dc_sink = sink ;
35783578 dc_sink_retain (aconnector -> dc_sink );
35793579 if (sink -> dc_edid .length == 0 ) {
3580- aconnector -> edid = NULL ;
3580+ aconnector -> drm_edid = NULL ;
35813581 if (aconnector -> dc_link -> aux_mode ) {
35823582 drm_dp_cec_unset_edid (
35833583 & aconnector -> dm_dp_aux .aux );
35843584 }
35853585 } else {
3586- aconnector -> edid =
3587- (struct edid * )sink -> dc_edid .raw_edid ;
3586+ const struct edid * edid = (const struct edid * )sink -> dc_edid .raw_edid ;
3587+
3588+ aconnector -> drm_edid = drm_edid_alloc (edid , sink -> dc_edid .length );
3589+ drm_edid_connector_update (connector , aconnector -> drm_edid );
35883590
35893591 if (aconnector -> dc_link -> aux_mode )
3590- drm_dp_cec_set_edid (& aconnector -> dm_dp_aux .aux ,
3591- aconnector -> edid );
3592+ drm_dp_cec_set_edid (& aconnector -> dm_dp_aux .aux , edid );
35923593 }
35933594
35943595 if (!aconnector -> timing_requested ) {
@@ -3599,17 +3600,18 @@ void amdgpu_dm_update_connector_after_detect(
35993600 "failed to create aconnector->requested_timing\n" );
36003601 }
36013602
3602- drm_connector_update_edid_property (connector , aconnector -> edid );
3603- amdgpu_dm_update_freesync_caps (connector , aconnector -> edid );
3603+ drm_edid_connector_update (connector , aconnector -> drm_edid );
3604+ amdgpu_dm_update_freesync_caps (connector , aconnector -> drm_edid );
36043605 update_connector_ext_caps (aconnector );
36053606 } else {
36063607 drm_dp_cec_unset_edid (& aconnector -> dm_dp_aux .aux );
36073608 amdgpu_dm_update_freesync_caps (connector , NULL );
3608- drm_connector_update_edid_property (connector , NULL );
3609+ drm_edid_connector_update (connector , NULL );
36093610 aconnector -> num_modes = 0 ;
36103611 dc_sink_release (aconnector -> dc_sink );
36113612 aconnector -> dc_sink = NULL ;
3612- aconnector -> edid = NULL ;
3613+ drm_edid_free (aconnector -> drm_edid );
3614+ aconnector -> drm_edid = NULL ;
36133615 kfree (aconnector -> timing_requested );
36143616 aconnector -> timing_requested = NULL ;
36153617 /* Set CP to DESIRED if it was ENABLED, so we can re-enable it again on hotplug */
@@ -7145,32 +7147,24 @@ static void amdgpu_dm_connector_funcs_force(struct drm_connector *connector)
71457147 struct amdgpu_dm_connector * aconnector = to_amdgpu_dm_connector (connector );
71467148 struct dc_link * dc_link = aconnector -> dc_link ;
71477149 struct dc_sink * dc_em_sink = aconnector -> dc_em_sink ;
7148- struct edid * edid ;
7149- struct i2c_adapter * ddc ;
7150-
7151- if (dc_link && dc_link -> aux_mode )
7152- ddc = & aconnector -> dm_dp_aux .aux .ddc ;
7153- else
7154- ddc = & aconnector -> i2c -> base ;
7150+ const struct drm_edid * drm_edid ;
71557151
7156- /*
7157- * Note: drm_get_edid gets edid in the following order:
7158- * 1) override EDID if set via edid_override debugfs,
7159- * 2) firmware EDID if set via edid_firmware module parameter
7160- * 3) regular DDC read.
7161- */
7162- edid = drm_get_edid (connector , ddc );
7163- if (!edid ) {
7152+ drm_edid = drm_edid_read (connector );
7153+ drm_edid_connector_update (connector , drm_edid );
7154+ if (!drm_edid ) {
71647155 DRM_ERROR ("No EDID found on connector: %s.\n" , connector -> name );
71657156 return ;
71667157 }
71677158
7168- aconnector -> edid = edid ;
7169-
7159+ aconnector -> drm_edid = drm_edid ;
71707160 /* Update emulated (virtual) sink's EDID */
71717161 if (dc_em_sink && dc_link ) {
7162+ // FIXME: Get rid of drm_edid_raw()
7163+ const struct edid * edid = drm_edid_raw (drm_edid );
7164+
71727165 memset (& dc_em_sink -> edid_caps , 0 , sizeof (struct dc_edid_caps ));
7173- memmove (dc_em_sink -> dc_edid .raw_edid , edid , (edid -> extensions + 1 ) * EDID_LENGTH );
7166+ memmove (dc_em_sink -> dc_edid .raw_edid , edid ,
7167+ (edid -> extensions + 1 ) * EDID_LENGTH );
71747168 dm_helpers_parse_edid_caps (
71757169 dc_link ,
71767170 & dc_em_sink -> dc_edid ,
@@ -7200,36 +7194,26 @@ static int get_modes(struct drm_connector *connector)
72007194static void create_eml_sink (struct amdgpu_dm_connector * aconnector )
72017195{
72027196 struct drm_connector * connector = & aconnector -> base ;
7203- struct dc_link * dc_link = aconnector -> dc_link ;
72047197 struct dc_sink_init_data init_params = {
72057198 .link = aconnector -> dc_link ,
72067199 .sink_signal = SIGNAL_TYPE_VIRTUAL
72077200 };
7208- struct edid * edid ;
7209- struct i2c_adapter * ddc ;
7210-
7211- if (dc_link -> aux_mode )
7212- ddc = & aconnector -> dm_dp_aux .aux .ddc ;
7213- else
7214- ddc = & aconnector -> i2c -> base ;
7201+ const struct drm_edid * drm_edid ;
7202+ const struct edid * edid ;
72157203
7216- /*
7217- * Note: drm_get_edid gets edid in the following order:
7218- * 1) override EDID if set via edid_override debugfs,
7219- * 2) firmware EDID if set via edid_firmware module parameter
7220- * 3) regular DDC read.
7221- */
7222- edid = drm_get_edid (connector , ddc );
7223- if (!edid ) {
7204+ drm_edid = drm_edid_read (connector );
7205+ drm_edid_connector_update (connector , drm_edid );
7206+ if (!drm_edid ) {
72247207 DRM_ERROR ("No EDID found on connector: %s.\n" , connector -> name );
72257208 return ;
72267209 }
72277210
7228- if (drm_detect_hdmi_monitor ( edid ) )
7211+ if (connector -> display_info . is_hdmi )
72297212 init_params .sink_signal = SIGNAL_TYPE_HDMI_TYPE_A ;
72307213
7231- aconnector -> edid = edid ;
7214+ aconnector -> drm_edid = drm_edid ;
72327215
7216+ edid = drm_edid_raw (drm_edid ); // FIXME: Get rid of drm_edid_raw()
72337217 aconnector -> dc_em_sink = dc_link_add_remote_sink (
72347218 aconnector -> dc_link ,
72357219 (uint8_t * )edid ,
@@ -7916,16 +7900,16 @@ static void amdgpu_set_panel_orientation(struct drm_connector *connector)
79167900}
79177901
79187902static void amdgpu_dm_connector_ddc_get_modes (struct drm_connector * connector ,
7919- struct edid * edid )
7903+ const struct drm_edid * drm_edid )
79207904{
79217905 struct amdgpu_dm_connector * amdgpu_dm_connector =
79227906 to_amdgpu_dm_connector (connector );
79237907
7924- if (edid ) {
7908+ if (drm_edid ) {
79257909 /* empty probed_modes */
79267910 INIT_LIST_HEAD (& connector -> probed_modes );
79277911 amdgpu_dm_connector -> num_modes =
7928- drm_add_edid_modes (connector , edid );
7912+ drm_edid_connector_add_modes (connector );
79297913
79307914 /* sorting the probed modes before calling function
79317915 * amdgpu_dm_get_native_mode() since EDID can have
@@ -7939,10 +7923,10 @@ static void amdgpu_dm_connector_ddc_get_modes(struct drm_connector *connector,
79397923 amdgpu_dm_get_native_mode (connector );
79407924
79417925 /* Freesync capabilities are reset by calling
7942- * drm_add_edid_modes () and need to be
7926+ * drm_edid_connector_add_modes () and need to be
79437927 * restored here.
79447928 */
7945- amdgpu_dm_update_freesync_caps (connector , edid );
7929+ amdgpu_dm_update_freesync_caps (connector , drm_edid );
79467930 } else {
79477931 amdgpu_dm_connector -> num_modes = 0 ;
79487932 }
@@ -8038,12 +8022,12 @@ static uint add_fs_modes(struct amdgpu_dm_connector *aconnector)
80388022}
80398023
80408024static void amdgpu_dm_connector_add_freesync_modes (struct drm_connector * connector ,
8041- struct edid * edid )
8025+ const struct drm_edid * drm_edid )
80428026{
80438027 struct amdgpu_dm_connector * amdgpu_dm_connector =
80448028 to_amdgpu_dm_connector (connector );
80458029
8046- if (!(amdgpu_freesync_vid_mode && edid ))
8030+ if (!(amdgpu_freesync_vid_mode && drm_edid ))
80478031 return ;
80488032
80498033 if (amdgpu_dm_connector -> max_vfreq - amdgpu_dm_connector -> min_vfreq > 10 )
@@ -8056,24 +8040,24 @@ static int amdgpu_dm_connector_get_modes(struct drm_connector *connector)
80568040 struct amdgpu_dm_connector * amdgpu_dm_connector =
80578041 to_amdgpu_dm_connector (connector );
80588042 struct drm_encoder * encoder ;
8059- struct edid * edid = amdgpu_dm_connector -> edid ;
8043+ const struct drm_edid * drm_edid = amdgpu_dm_connector -> drm_edid ;
80608044 struct dc_link_settings * verified_link_cap =
80618045 & amdgpu_dm_connector -> dc_link -> verified_link_cap ;
80628046 const struct dc * dc = amdgpu_dm_connector -> dc_link -> dc ;
80638047
80648048 encoder = amdgpu_dm_connector_to_encoder (connector );
80658049
8066- if (!drm_edid_is_valid ( edid ) ) {
8050+ if (!drm_edid ) {
80678051 amdgpu_dm_connector -> num_modes =
80688052 drm_add_modes_noedid (connector , 640 , 480 );
80698053 if (dc -> link_srv -> dp_get_encoding_format (verified_link_cap ) == DP_128b_132b_ENCODING )
80708054 amdgpu_dm_connector -> num_modes +=
80718055 drm_add_modes_noedid (connector , 1920 , 1080 );
80728056 } else {
8073- amdgpu_dm_connector_ddc_get_modes (connector , edid );
8057+ amdgpu_dm_connector_ddc_get_modes (connector , drm_edid );
80748058 if (encoder )
80758059 amdgpu_dm_connector_add_common_modes (encoder , connector );
8076- amdgpu_dm_connector_add_freesync_modes (connector , edid );
8060+ amdgpu_dm_connector_add_freesync_modes (connector , drm_edid );
80778061 }
80788062 amdgpu_dm_fbc_init (connector );
80798063
@@ -12028,7 +12012,7 @@ static bool parse_edid_cea(struct amdgpu_dm_connector *aconnector,
1202812012}
1202912013
1203012014static void parse_edid_displayid_vrr (struct drm_connector * connector ,
12031- struct edid * edid )
12015+ const struct edid * edid )
1203212016{
1203312017 u8 * edid_ext = NULL ;
1203412018 int i ;
@@ -12071,7 +12055,7 @@ static void parse_edid_displayid_vrr(struct drm_connector *connector,
1207112055}
1207212056
1207312057static int parse_amd_vsdb (struct amdgpu_dm_connector * aconnector ,
12074- struct edid * edid , struct amdgpu_hdmi_vsdb_info * vsdb_info )
12058+ const struct edid * edid , struct amdgpu_hdmi_vsdb_info * vsdb_info )
1207512059{
1207612060 u8 * edid_ext = NULL ;
1207712061 int i ;
@@ -12106,7 +12090,8 @@ static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector,
1210612090}
1210712091
1210812092static int parse_hdmi_amd_vsdb (struct amdgpu_dm_connector * aconnector ,
12109- struct edid * edid , struct amdgpu_hdmi_vsdb_info * vsdb_info )
12093+ const struct edid * edid ,
12094+ struct amdgpu_hdmi_vsdb_info * vsdb_info )
1211012095{
1211112096 u8 * edid_ext = NULL ;
1211212097 int i ;
@@ -12140,27 +12125,27 @@ static int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconnector,
1214012125 * amdgpu_dm_update_freesync_caps - Update Freesync capabilities
1214112126 *
1214212127 * @connector: Connector to query.
12143- * @edid: EDID from monitor
12128+ * @drm_edid: DRM EDID from monitor
1214412129 *
1214512130 * Amdgpu supports Freesync in DP and HDMI displays, and it is required to keep
1214612131 * track of some of the display information in the internal data struct used by
1214712132 * amdgpu_dm. This function checks which type of connector we need to set the
1214812133 * FreeSync parameters.
1214912134 */
1215012135void amdgpu_dm_update_freesync_caps (struct drm_connector * connector ,
12151- struct edid * edid )
12136+ const struct drm_edid * drm_edid )
1215212137{
1215312138 int i = 0 ;
12154- struct detailed_timing * timing ;
12155- struct detailed_non_pixel * data ;
12156- struct detailed_data_monitor_range * range ;
12139+ const struct detailed_timing * timing ;
12140+ const struct detailed_non_pixel * data ;
12141+ const struct detailed_data_monitor_range * range ;
1215712142 struct amdgpu_dm_connector * amdgpu_dm_connector =
1215812143 to_amdgpu_dm_connector (connector );
1215912144 struct dm_connector_state * dm_con_state = NULL ;
1216012145 struct dc_sink * sink ;
12161-
1216212146 struct amdgpu_device * adev = drm_to_adev (connector -> dev );
1216312147 struct amdgpu_hdmi_vsdb_info vsdb_info = {0 };
12148+ const struct edid * edid ;
1216412149 bool freesync_capable = false;
1216512150 enum adaptive_sync_type as_type = ADAPTIVE_SYNC_TYPE_NONE ;
1216612151
@@ -12173,7 +12158,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
1217312158 amdgpu_dm_connector -> dc_sink :
1217412159 amdgpu_dm_connector -> dc_em_sink ;
1217512160
12176- if (!edid || !sink ) {
12161+ if (!drm_edid || !sink ) {
1217712162 dm_con_state = to_dm_connector_state (connector -> state );
1217812163
1217912164 amdgpu_dm_connector -> min_vfreq = 0 ;
@@ -12190,6 +12175,8 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
1219012175 if (!adev -> dm .freesync_module )
1219112176 goto update ;
1219212177
12178+ edid = drm_edid_raw (drm_edid ); // FIXME: Get rid of drm_edid_raw()
12179+
1219312180 /* Some eDP panels only have the refresh rate range info in DisplayID */
1219412181 if ((connector -> display_info .monitor_range .min_vfreq == 0 ||
1219512182 connector -> display_info .monitor_range .max_vfreq == 0 ))
@@ -12266,7 +12253,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
1226612253 amdgpu_dm_connector -> as_type = ADAPTIVE_SYNC_TYPE_EDP ;
1226712254 }
1226812255
12269- } else if (edid && sink -> sink_signal == SIGNAL_TYPE_HDMI_TYPE_A ) {
12256+ } else if (drm_edid && sink -> sink_signal == SIGNAL_TYPE_HDMI_TYPE_A ) {
1227012257 i = parse_hdmi_amd_vsdb (amdgpu_dm_connector , edid , & vsdb_info );
1227112258 if (i >= 0 && vsdb_info .freesync_supported ) {
1227212259 amdgpu_dm_connector -> min_vfreq = vsdb_info .min_refresh_rate_hz ;
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