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drm/edid: Define the quirks in an enum list
An enum list is better suited to define a quirk list, do that. This makes looking up a quirk more robust and also allows for separating quirks internal to the EDID parser and global quirks which can be queried outside of the EDID parser (added as a follow-up). Suggested-by: Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/20250605082850.65136-3-imre.deak@intel.com
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‎drivers/gpu/drm/drm_edid.c‎

Lines changed: 112 additions & 106 deletions
Original file line numberDiff line numberDiff line change
@@ -66,34 +66,36 @@ static int oui(u8 first, u8 second, u8 third)
6666
* on as many displays as possible).
6767
*/
6868

69-
/* First detailed mode wrong, use largest 60Hz mode */
70-
#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
71-
/* Reported 135MHz pixel clock is too high, needs adjustment */
72-
#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
73-
/* Prefer the largest mode at 75 Hz */
74-
#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
75-
/* Detail timing is in cm not mm */
76-
#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
77-
/* Detailed timing descriptors have bogus size values, so just take the
78-
* maximum size and use that.
79-
*/
80-
#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
81-
/* use +hsync +vsync for detailed mode */
82-
#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
83-
/* Force reduced-blanking timings for detailed modes */
84-
#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
85-
/* Force 8bpc */
86-
#define EDID_QUIRK_FORCE_8BPC (1 << 8)
87-
/* Force 12bpc */
88-
#define EDID_QUIRK_FORCE_12BPC (1 << 9)
89-
/* Force 6bpc */
90-
#define EDID_QUIRK_FORCE_6BPC (1 << 10)
91-
/* Force 10bpc */
92-
#define EDID_QUIRK_FORCE_10BPC (1 << 11)
93-
/* Non desktop display (i.e. HMD) */
94-
#define EDID_QUIRK_NON_DESKTOP (1 << 12)
95-
/* Cap the DSC target bitrate to 15bpp */
96-
#define EDID_QUIRK_CAP_DSC_15BPP (1 << 13)
69+
enum drm_edid_internal_quirk {
70+
/* First detailed mode wrong, use largest 60Hz mode */
71+
EDID_QUIRK_PREFER_LARGE_60,
72+
/* Reported 135MHz pixel clock is too high, needs adjustment */
73+
EDID_QUIRK_135_CLOCK_TOO_HIGH,
74+
/* Prefer the largest mode at 75 Hz */
75+
EDID_QUIRK_PREFER_LARGE_75,
76+
/* Detail timing is in cm not mm */
77+
EDID_QUIRK_DETAILED_IN_CM,
78+
/* Detailed timing descriptors have bogus size values, so just take the
79+
* maximum size and use that.
80+
*/
81+
EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE,
82+
/* use +hsync +vsync for detailed mode */
83+
EDID_QUIRK_DETAILED_SYNC_PP,
84+
/* Force reduced-blanking timings for detailed modes */
85+
EDID_QUIRK_FORCE_REDUCED_BLANKING,
86+
/* Force 8bpc */
87+
EDID_QUIRK_FORCE_8BPC,
88+
/* Force 12bpc */
89+
EDID_QUIRK_FORCE_12BPC,
90+
/* Force 6bpc */
91+
EDID_QUIRK_FORCE_6BPC,
92+
/* Force 10bpc */
93+
EDID_QUIRK_FORCE_10BPC,
94+
/* Non desktop display (i.e. HMD) */
95+
EDID_QUIRK_NON_DESKTOP,
96+
/* Cap the DSC target bitrate to 15bpp */
97+
EDID_QUIRK_CAP_DSC_15BPP,
98+
};
9799

98100
#define MICROSOFT_IEEE_OUI 0xca125c
99101

@@ -128,124 +130,124 @@ static const struct edid_quirk {
128130
u32 quirks;
129131
} edid_quirk_list[] = {
130132
/* Acer AL1706 */
131-
EDID_QUIRK('A', 'C', 'R', 44358, EDID_QUIRK_PREFER_LARGE_60),
133+
EDID_QUIRK('A', 'C', 'R', 44358, BIT(EDID_QUIRK_PREFER_LARGE_60)),
132134
/* Acer F51 */
133-
EDID_QUIRK('A', 'P', 'I', 0x7602, EDID_QUIRK_PREFER_LARGE_60),
135+
EDID_QUIRK('A', 'P', 'I', 0x7602, BIT(EDID_QUIRK_PREFER_LARGE_60)),
134136

135137
/* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
136-
EDID_QUIRK('A', 'E', 'O', 0, EDID_QUIRK_FORCE_6BPC),
138+
EDID_QUIRK('A', 'E', 'O', 0, BIT(EDID_QUIRK_FORCE_6BPC)),
137139

138140
/* BenQ GW2765 */
139-
EDID_QUIRK('B', 'N', 'Q', 0x78d6, EDID_QUIRK_FORCE_8BPC),
141+
EDID_QUIRK('B', 'N', 'Q', 0x78d6, BIT(EDID_QUIRK_FORCE_8BPC)),
140142

141143
/* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */
142-
EDID_QUIRK('B', 'O', 'E', 0x78b, EDID_QUIRK_FORCE_6BPC),
144+
EDID_QUIRK('B', 'O', 'E', 0x78b, BIT(EDID_QUIRK_FORCE_6BPC)),
143145

144146
/* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */
145-
EDID_QUIRK('C', 'P', 'T', 0x17df, EDID_QUIRK_FORCE_6BPC),
147+
EDID_QUIRK('C', 'P', 'T', 0x17df, BIT(EDID_QUIRK_FORCE_6BPC)),
146148

147149
/* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
148-
EDID_QUIRK('S', 'D', 'C', 0x3652, EDID_QUIRK_FORCE_6BPC),
150+
EDID_QUIRK('S', 'D', 'C', 0x3652, BIT(EDID_QUIRK_FORCE_6BPC)),
149151

150152
/* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
151-
EDID_QUIRK('B', 'O', 'E', 0x0771, EDID_QUIRK_FORCE_6BPC),
153+
EDID_QUIRK('B', 'O', 'E', 0x0771, BIT(EDID_QUIRK_FORCE_6BPC)),
152154

153155
/* Belinea 10 15 55 */
154-
EDID_QUIRK('M', 'A', 'X', 1516, EDID_QUIRK_PREFER_LARGE_60),
155-
EDID_QUIRK('M', 'A', 'X', 0x77e, EDID_QUIRK_PREFER_LARGE_60),
156+
EDID_QUIRK('M', 'A', 'X', 1516, BIT(EDID_QUIRK_PREFER_LARGE_60)),
157+
EDID_QUIRK('M', 'A', 'X', 0x77e, BIT(EDID_QUIRK_PREFER_LARGE_60)),
156158

157159
/* Envision Peripherals, Inc. EN-7100e */
158-
EDID_QUIRK('E', 'P', 'I', 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH),
160+
EDID_QUIRK('E', 'P', 'I', 59264, BIT(EDID_QUIRK_135_CLOCK_TOO_HIGH)),
159161
/* Envision EN2028 */
160-
EDID_QUIRK('E', 'P', 'I', 8232, EDID_QUIRK_PREFER_LARGE_60),
162+
EDID_QUIRK('E', 'P', 'I', 8232, BIT(EDID_QUIRK_PREFER_LARGE_60)),
161163

162164
/* Funai Electronics PM36B */
163-
EDID_QUIRK('F', 'C', 'M', 13600, EDID_QUIRK_PREFER_LARGE_75 |
164-
EDID_QUIRK_DETAILED_IN_CM),
165+
EDID_QUIRK('F', 'C', 'M', 13600, BIT(EDID_QUIRK_PREFER_LARGE_75) |
166+
BIT(EDID_QUIRK_DETAILED_IN_CM)),
165167

166168
/* LG 27GP950 */
167-
EDID_QUIRK('G', 'S', 'M', 0x5bbf, EDID_QUIRK_CAP_DSC_15BPP),
169+
EDID_QUIRK('G', 'S', 'M', 0x5bbf, BIT(EDID_QUIRK_CAP_DSC_15BPP)),
168170

169171
/* LG 27GN950 */
170-
EDID_QUIRK('G', 'S', 'M', 0x5b9a, EDID_QUIRK_CAP_DSC_15BPP),
172+
EDID_QUIRK('G', 'S', 'M', 0x5b9a, BIT(EDID_QUIRK_CAP_DSC_15BPP)),
171173

172174
/* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */
173-
EDID_QUIRK('L', 'G', 'D', 764, EDID_QUIRK_FORCE_10BPC),
175+
EDID_QUIRK('L', 'G', 'D', 764, BIT(EDID_QUIRK_FORCE_10BPC)),
174176

175177
/* LG Philips LCD LP154W01-A5 */
176-
EDID_QUIRK('L', 'P', 'L', 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE),
177-
EDID_QUIRK('L', 'P', 'L', 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE),
178+
EDID_QUIRK('L', 'P', 'L', 0, BIT(EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE)),
179+
EDID_QUIRK('L', 'P', 'L', 0x2a00, BIT(EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE)),
178180

179181
/* Samsung SyncMaster 205BW. Note: irony */
180-
EDID_QUIRK('S', 'A', 'M', 541, EDID_QUIRK_DETAILED_SYNC_PP),
182+
EDID_QUIRK('S', 'A', 'M', 541, BIT(EDID_QUIRK_DETAILED_SYNC_PP)),
181183
/* Samsung SyncMaster 22[5-6]BW */
182-
EDID_QUIRK('S', 'A', 'M', 596, EDID_QUIRK_PREFER_LARGE_60),
183-
EDID_QUIRK('S', 'A', 'M', 638, EDID_QUIRK_PREFER_LARGE_60),
184+
EDID_QUIRK('S', 'A', 'M', 596, BIT(EDID_QUIRK_PREFER_LARGE_60)),
185+
EDID_QUIRK('S', 'A', 'M', 638, BIT(EDID_QUIRK_PREFER_LARGE_60)),
184186

185187
/* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
186-
EDID_QUIRK('S', 'N', 'Y', 0x2541, EDID_QUIRK_FORCE_12BPC),
188+
EDID_QUIRK('S', 'N', 'Y', 0x2541, BIT(EDID_QUIRK_FORCE_12BPC)),
187189

188190
/* ViewSonic VA2026w */
189-
EDID_QUIRK('V', 'S', 'C', 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING),
191+
EDID_QUIRK('V', 'S', 'C', 5020, BIT(EDID_QUIRK_FORCE_REDUCED_BLANKING)),
190192

191193
/* Medion MD 30217 PG */
192-
EDID_QUIRK('M', 'E', 'D', 0x7b8, EDID_QUIRK_PREFER_LARGE_75),
194+
EDID_QUIRK('M', 'E', 'D', 0x7b8, BIT(EDID_QUIRK_PREFER_LARGE_75)),
193195

194196
/* Lenovo G50 */
195-
EDID_QUIRK('S', 'D', 'C', 18514, EDID_QUIRK_FORCE_6BPC),
197+
EDID_QUIRK('S', 'D', 'C', 18514, BIT(EDID_QUIRK_FORCE_6BPC)),
196198

197199
/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
198-
EDID_QUIRK('S', 'E', 'C', 0xd033, EDID_QUIRK_FORCE_8BPC),
200+
EDID_QUIRK('S', 'E', 'C', 0xd033, BIT(EDID_QUIRK_FORCE_8BPC)),
199201

200202
/* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
201-
EDID_QUIRK('E', 'T', 'R', 13896, EDID_QUIRK_FORCE_8BPC),
203+
EDID_QUIRK('E', 'T', 'R', 13896, BIT(EDID_QUIRK_FORCE_8BPC)),
202204

203205
/* Valve Index Headset */
204-
EDID_QUIRK('V', 'L', 'V', 0x91a8, EDID_QUIRK_NON_DESKTOP),
205-
EDID_QUIRK('V', 'L', 'V', 0x91b0, EDID_QUIRK_NON_DESKTOP),
206-
EDID_QUIRK('V', 'L', 'V', 0x91b1, EDID_QUIRK_NON_DESKTOP),
207-
EDID_QUIRK('V', 'L', 'V', 0x91b2, EDID_QUIRK_NON_DESKTOP),
208-
EDID_QUIRK('V', 'L', 'V', 0x91b3, EDID_QUIRK_NON_DESKTOP),
209-
EDID_QUIRK('V', 'L', 'V', 0x91b4, EDID_QUIRK_NON_DESKTOP),
210-
EDID_QUIRK('V', 'L', 'V', 0x91b5, EDID_QUIRK_NON_DESKTOP),
211-
EDID_QUIRK('V', 'L', 'V', 0x91b6, EDID_QUIRK_NON_DESKTOP),
212-
EDID_QUIRK('V', 'L', 'V', 0x91b7, EDID_QUIRK_NON_DESKTOP),
213-
EDID_QUIRK('V', 'L', 'V', 0x91b8, EDID_QUIRK_NON_DESKTOP),
214-
EDID_QUIRK('V', 'L', 'V', 0x91b9, EDID_QUIRK_NON_DESKTOP),
215-
EDID_QUIRK('V', 'L', 'V', 0x91ba, EDID_QUIRK_NON_DESKTOP),
216-
EDID_QUIRK('V', 'L', 'V', 0x91bb, EDID_QUIRK_NON_DESKTOP),
217-
EDID_QUIRK('V', 'L', 'V', 0x91bc, EDID_QUIRK_NON_DESKTOP),
218-
EDID_QUIRK('V', 'L', 'V', 0x91bd, EDID_QUIRK_NON_DESKTOP),
219-
EDID_QUIRK('V', 'L', 'V', 0x91be, EDID_QUIRK_NON_DESKTOP),
220-
EDID_QUIRK('V', 'L', 'V', 0x91bf, EDID_QUIRK_NON_DESKTOP),
206+
EDID_QUIRK('V', 'L', 'V', 0x91a8, BIT(EDID_QUIRK_NON_DESKTOP)),
207+
EDID_QUIRK('V', 'L', 'V', 0x91b0, BIT(EDID_QUIRK_NON_DESKTOP)),
208+
EDID_QUIRK('V', 'L', 'V', 0x91b1, BIT(EDID_QUIRK_NON_DESKTOP)),
209+
EDID_QUIRK('V', 'L', 'V', 0x91b2, BIT(EDID_QUIRK_NON_DESKTOP)),
210+
EDID_QUIRK('V', 'L', 'V', 0x91b3, BIT(EDID_QUIRK_NON_DESKTOP)),
211+
EDID_QUIRK('V', 'L', 'V', 0x91b4, BIT(EDID_QUIRK_NON_DESKTOP)),
212+
EDID_QUIRK('V', 'L', 'V', 0x91b5, BIT(EDID_QUIRK_NON_DESKTOP)),
213+
EDID_QUIRK('V', 'L', 'V', 0x91b6, BIT(EDID_QUIRK_NON_DESKTOP)),
214+
EDID_QUIRK('V', 'L', 'V', 0x91b7, BIT(EDID_QUIRK_NON_DESKTOP)),
215+
EDID_QUIRK('V', 'L', 'V', 0x91b8, BIT(EDID_QUIRK_NON_DESKTOP)),
216+
EDID_QUIRK('V', 'L', 'V', 0x91b9, BIT(EDID_QUIRK_NON_DESKTOP)),
217+
EDID_QUIRK('V', 'L', 'V', 0x91ba, BIT(EDID_QUIRK_NON_DESKTOP)),
218+
EDID_QUIRK('V', 'L', 'V', 0x91bb, BIT(EDID_QUIRK_NON_DESKTOP)),
219+
EDID_QUIRK('V', 'L', 'V', 0x91bc, BIT(EDID_QUIRK_NON_DESKTOP)),
220+
EDID_QUIRK('V', 'L', 'V', 0x91bd, BIT(EDID_QUIRK_NON_DESKTOP)),
221+
EDID_QUIRK('V', 'L', 'V', 0x91be, BIT(EDID_QUIRK_NON_DESKTOP)),
222+
EDID_QUIRK('V', 'L', 'V', 0x91bf, BIT(EDID_QUIRK_NON_DESKTOP)),
221223

222224
/* HTC Vive and Vive Pro VR Headsets */
223-
EDID_QUIRK('H', 'V', 'R', 0xaa01, EDID_QUIRK_NON_DESKTOP),
224-
EDID_QUIRK('H', 'V', 'R', 0xaa02, EDID_QUIRK_NON_DESKTOP),
225+
EDID_QUIRK('H', 'V', 'R', 0xaa01, BIT(EDID_QUIRK_NON_DESKTOP)),
226+
EDID_QUIRK('H', 'V', 'R', 0xaa02, BIT(EDID_QUIRK_NON_DESKTOP)),
225227

226228
/* Oculus Rift DK1, DK2, CV1 and Rift S VR Headsets */
227-
EDID_QUIRK('O', 'V', 'R', 0x0001, EDID_QUIRK_NON_DESKTOP),
228-
EDID_QUIRK('O', 'V', 'R', 0x0003, EDID_QUIRK_NON_DESKTOP),
229-
EDID_QUIRK('O', 'V', 'R', 0x0004, EDID_QUIRK_NON_DESKTOP),
230-
EDID_QUIRK('O', 'V', 'R', 0x0012, EDID_QUIRK_NON_DESKTOP),
229+
EDID_QUIRK('O', 'V', 'R', 0x0001, BIT(EDID_QUIRK_NON_DESKTOP)),
230+
EDID_QUIRK('O', 'V', 'R', 0x0003, BIT(EDID_QUIRK_NON_DESKTOP)),
231+
EDID_QUIRK('O', 'V', 'R', 0x0004, BIT(EDID_QUIRK_NON_DESKTOP)),
232+
EDID_QUIRK('O', 'V', 'R', 0x0012, BIT(EDID_QUIRK_NON_DESKTOP)),
231233

232234
/* Windows Mixed Reality Headsets */
233-
EDID_QUIRK('A', 'C', 'R', 0x7fce, EDID_QUIRK_NON_DESKTOP),
234-
EDID_QUIRK('L', 'E', 'N', 0x0408, EDID_QUIRK_NON_DESKTOP),
235-
EDID_QUIRK('F', 'U', 'J', 0x1970, EDID_QUIRK_NON_DESKTOP),
236-
EDID_QUIRK('D', 'E', 'L', 0x7fce, EDID_QUIRK_NON_DESKTOP),
237-
EDID_QUIRK('S', 'E', 'C', 0x144a, EDID_QUIRK_NON_DESKTOP),
238-
EDID_QUIRK('A', 'U', 'S', 0xc102, EDID_QUIRK_NON_DESKTOP),
235+
EDID_QUIRK('A', 'C', 'R', 0x7fce, BIT(EDID_QUIRK_NON_DESKTOP)),
236+
EDID_QUIRK('L', 'E', 'N', 0x0408, BIT(EDID_QUIRK_NON_DESKTOP)),
237+
EDID_QUIRK('F', 'U', 'J', 0x1970, BIT(EDID_QUIRK_NON_DESKTOP)),
238+
EDID_QUIRK('D', 'E', 'L', 0x7fce, BIT(EDID_QUIRK_NON_DESKTOP)),
239+
EDID_QUIRK('S', 'E', 'C', 0x144a, BIT(EDID_QUIRK_NON_DESKTOP)),
240+
EDID_QUIRK('A', 'U', 'S', 0xc102, BIT(EDID_QUIRK_NON_DESKTOP)),
239241

240242
/* Sony PlayStation VR Headset */
241-
EDID_QUIRK('S', 'N', 'Y', 0x0704, EDID_QUIRK_NON_DESKTOP),
243+
EDID_QUIRK('S', 'N', 'Y', 0x0704, BIT(EDID_QUIRK_NON_DESKTOP)),
242244

243245
/* Sensics VR Headsets */
244-
EDID_QUIRK('S', 'E', 'N', 0x1019, EDID_QUIRK_NON_DESKTOP),
246+
EDID_QUIRK('S', 'E', 'N', 0x1019, BIT(EDID_QUIRK_NON_DESKTOP)),
245247

246248
/* OSVR HDK and HDK2 VR Headsets */
247-
EDID_QUIRK('S', 'V', 'R', 0x1019, EDID_QUIRK_NON_DESKTOP),
248-
EDID_QUIRK('A', 'U', 'O', 0x1111, EDID_QUIRK_NON_DESKTOP),
249+
EDID_QUIRK('S', 'V', 'R', 0x1019, BIT(EDID_QUIRK_NON_DESKTOP)),
250+
EDID_QUIRK('A', 'U', 'O', 0x1111, BIT(EDID_QUIRK_NON_DESKTOP)),
249251
};
250252

251253
/*
@@ -2951,6 +2953,12 @@ static u32 edid_get_quirks(const struct drm_edid *drm_edid)
29512953
return 0;
29522954
}
29532955

2956+
static bool drm_edid_has_internal_quirk(struct drm_connector *connector,
2957+
enum drm_edid_internal_quirk quirk)
2958+
{
2959+
return connector->display_info.quirks & BIT(quirk);
2960+
}
2961+
29542962
#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
29552963
#define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
29562964

@@ -2960,17 +2968,16 @@ static u32 edid_get_quirks(const struct drm_edid *drm_edid)
29602968
*/
29612969
static void edid_fixup_preferred(struct drm_connector *connector)
29622970
{
2963-
const struct drm_display_info *info = &connector->display_info;
29642971
struct drm_display_mode *t, *cur_mode, *preferred_mode;
29652972
int target_refresh = 0;
29662973
int cur_vrefresh, preferred_vrefresh;
29672974

29682975
if (list_empty(&connector->probed_modes))
29692976
return;
29702977

2971-
if (info->quirks & EDID_QUIRK_PREFER_LARGE_60)
2978+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_PREFER_LARGE_60))
29722979
target_refresh = 60;
2973-
if (info->quirks & EDID_QUIRK_PREFER_LARGE_75)
2980+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_PREFER_LARGE_75))
29742981
target_refresh = 75;
29752982

29762983
preferred_mode = list_first_entry(&connector->probed_modes,
@@ -3474,7 +3481,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto
34743481
const struct drm_edid *drm_edid,
34753482
const struct detailed_timing *timing)
34763483
{
3477-
const struct drm_display_info *info = &connector->display_info;
34783484
struct drm_device *dev = connector->dev;
34793485
struct drm_display_mode *mode;
34803486
const struct detailed_pixel_timing *pt = &timing->data.pixel_data;
@@ -3508,7 +3514,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto
35083514
return NULL;
35093515
}
35103516

3511-
if (info->quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
3517+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_REDUCED_BLANKING)) {
35123518
mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
35133519
if (!mode)
35143520
return NULL;
@@ -3520,7 +3526,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto
35203526
if (!mode)
35213527
return NULL;
35223528

3523-
if (info->quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
3529+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_135_CLOCK_TOO_HIGH))
35243530
mode->clock = 1088 * 10;
35253531
else
35263532
mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
@@ -3551,7 +3557,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto
35513557

35523558
drm_mode_do_interlace_quirk(mode, pt);
35533559

3554-
if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
3560+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_DETAILED_SYNC_PP)) {
35553561
mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
35563562
} else {
35573563
mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
@@ -3564,12 +3570,12 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto
35643570
mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
35653571
mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
35663572

3567-
if (info->quirks & EDID_QUIRK_DETAILED_IN_CM) {
3573+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_DETAILED_IN_CM)) {
35683574
mode->width_mm *= 10;
35693575
mode->height_mm *= 10;
35703576
}
35713577

3572-
if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
3578+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE)) {
35733579
mode->width_mm = drm_edid->edid->width_cm * 10;
35743580
mode->height_mm = drm_edid->edid->height_cm * 10;
35753581
}
@@ -6734,26 +6740,26 @@ static void update_display_info(struct drm_connector *connector,
67346740
drm_update_mso(connector, drm_edid);
67356741

67366742
out:
6737-
if (info->quirks & EDID_QUIRK_NON_DESKTOP) {
6743+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_NON_DESKTOP)) {
67386744
drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Non-desktop display%s\n",
67396745
connector->base.id, connector->name,
67406746
info->non_desktop ? " (redundant quirk)" : "");
67416747
info->non_desktop = true;
67426748
}
67436749

6744-
if (info->quirks & EDID_QUIRK_CAP_DSC_15BPP)
6750+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_CAP_DSC_15BPP))
67456751
info->max_dsc_bpp = 15;
67466752

6747-
if (info->quirks & EDID_QUIRK_FORCE_6BPC)
6753+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_6BPC))
67486754
info->bpc = 6;
67496755

6750-
if (info->quirks & EDID_QUIRK_FORCE_8BPC)
6756+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_8BPC))
67516757
info->bpc = 8;
67526758

6753-
if (info->quirks & EDID_QUIRK_FORCE_10BPC)
6759+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_10BPC))
67546760
info->bpc = 10;
67556761

6756-
if (info->quirks & EDID_QUIRK_FORCE_12BPC)
6762+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_12BPC))
67576763
info->bpc = 12;
67586764

67596765
/* Depends on info->cea_rev set by drm_parse_cea_ext() above */
@@ -6918,7 +6924,6 @@ static int add_displayid_detailed_modes(struct drm_connector *connector,
69186924
static int _drm_edid_connector_add_modes(struct drm_connector *connector,
69196925
const struct drm_edid *drm_edid)
69206926
{
6921-
const struct drm_display_info *info = &connector->display_info;
69226927
int num_modes = 0;
69236928

69246929
if (!drm_edid)
@@ -6948,7 +6953,8 @@ static int _drm_edid_connector_add_modes(struct drm_connector *connector,
69486953
if (drm_edid->edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ)
69496954
num_modes += add_inferred_modes(connector, drm_edid);
69506955

6951-
if (info->quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
6956+
if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_PREFER_LARGE_60) ||
6957+
drm_edid_has_internal_quirk(connector, EDID_QUIRK_PREFER_LARGE_75))
69526958
edid_fixup_preferred(connector);
69536959

69546960
return num_modes;

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