2626#include <linux/module.h>
2727#include <linux/platform_data/b53.h>
2828#include <linux/phy.h>
29+ #include <linux/phylink.h>
2930#include <linux/etherdevice.h>
3031#include <linux/if_bridge.h>
3132#include <net/dsa.h>
@@ -947,33 +948,50 @@ static int b53_setup(struct dsa_switch *ds)
947948 return ret ;
948949}
949950
950- static void b53_adjust_link (struct dsa_switch * ds , int port ,
951- struct phy_device * phydev )
951+ static void b53_force_link (struct b53_device * dev , int port , int link )
952952{
953- struct b53_device * dev = ds -> priv ;
954- struct ethtool_eee * p = & dev -> ports [port ].eee ;
955- u8 rgmii_ctrl = 0 , reg = 0 , off ;
956-
957- if (!phy_is_pseudo_fixed_link (phydev ))
958- return ;
953+ u8 reg , val , off ;
959954
960955 /* Override the port settings */
961956 if (port == dev -> cpu_port ) {
962957 off = B53_PORT_OVERRIDE_CTRL ;
963- reg = PORT_OVERRIDE_EN ;
958+ val = PORT_OVERRIDE_EN ;
964959 } else {
965960 off = B53_GMII_PORT_OVERRIDE_CTRL (port );
966- reg = GMII_PO_EN ;
961+ val = GMII_PO_EN ;
967962 }
968963
969- /* Set the link UP */
970- if (phydev -> link )
964+ b53_read8 (dev , B53_CTRL_PAGE , off , & reg );
965+ reg |= val ;
966+ if (link )
971967 reg |= PORT_OVERRIDE_LINK ;
968+ else
969+ reg &= ~PORT_OVERRIDE_LINK ;
970+ b53_write8 (dev , B53_CTRL_PAGE , off , reg );
971+ }
972+
973+ static void b53_force_port_config (struct b53_device * dev , int port ,
974+ int speed , int duplex , int pause )
975+ {
976+ u8 reg , val , off ;
977+
978+ /* Override the port settings */
979+ if (port == dev -> cpu_port ) {
980+ off = B53_PORT_OVERRIDE_CTRL ;
981+ val = PORT_OVERRIDE_EN ;
982+ } else {
983+ off = B53_GMII_PORT_OVERRIDE_CTRL (port );
984+ val = GMII_PO_EN ;
985+ }
972986
973- if (phydev -> duplex == DUPLEX_FULL )
987+ b53_read8 (dev , B53_CTRL_PAGE , off , & reg );
988+ reg |= val ;
989+ if (duplex == DUPLEX_FULL )
974990 reg |= PORT_OVERRIDE_FULL_DUPLEX ;
991+ else
992+ reg &= ~PORT_OVERRIDE_FULL_DUPLEX ;
975993
976- switch (phydev -> speed ) {
994+ switch (speed ) {
977995 case 2000 :
978996 reg |= PORT_OVERRIDE_SPEED_2000M ;
979997 /* fallthrough */
@@ -987,21 +1005,41 @@ static void b53_adjust_link(struct dsa_switch *ds, int port,
9871005 reg |= PORT_OVERRIDE_SPEED_10M ;
9881006 break ;
9891007 default :
990- dev_err (ds -> dev , "unknown speed: %d\n" , phydev -> speed );
1008+ dev_err (dev -> dev , "unknown speed: %d\n" , speed );
9911009 return ;
9921010 }
9931011
1012+ if (pause & MLO_PAUSE_RX )
1013+ reg |= PORT_OVERRIDE_RX_FLOW ;
1014+ if (pause & MLO_PAUSE_TX )
1015+ reg |= PORT_OVERRIDE_TX_FLOW ;
1016+
1017+ b53_write8 (dev , B53_CTRL_PAGE , off , reg );
1018+ }
1019+
1020+ static void b53_adjust_link (struct dsa_switch * ds , int port ,
1021+ struct phy_device * phydev )
1022+ {
1023+ struct b53_device * dev = ds -> priv ;
1024+ struct ethtool_eee * p = & dev -> ports [port ].eee ;
1025+ u8 rgmii_ctrl = 0 , reg = 0 , off ;
1026+ int pause ;
1027+
1028+ if (!phy_is_pseudo_fixed_link (phydev ))
1029+ return ;
1030+
9941031 /* Enable flow control on BCM5301x's CPU port */
9951032 if (is5301x (dev ) && port == dev -> cpu_port )
996- reg |= PORT_OVERRIDE_RX_FLOW | PORT_OVERRIDE_TX_FLOW ;
1033+ pause = MLO_PAUSE_TXRX_MASK ;
9971034
9981035 if (phydev -> pause ) {
9991036 if (phydev -> asym_pause )
1000- reg |= PORT_OVERRIDE_TX_FLOW ;
1001- reg |= PORT_OVERRIDE_RX_FLOW ;
1037+ pause |= MLO_PAUSE_TX ;
1038+ pause |= MLO_PAUSE_RX ;
10021039 }
10031040
1004- b53_write8 (dev , B53_CTRL_PAGE , off , reg );
1041+ b53_force_port_config (dev , port , phydev -> speed , phydev -> duplex , pause );
1042+ b53_force_link (dev , port , phydev -> link );
10051043
10061044 if (is531x5 (dev ) && phy_interface_is_rgmii (phydev )) {
10071045 if (port == 8 )
@@ -1061,16 +1099,9 @@ static void b53_adjust_link(struct dsa_switch *ds, int port,
10611099 }
10621100 } else if (is5301x (dev )) {
10631101 if (port != dev -> cpu_port ) {
1064- u8 po_reg = B53_GMII_PORT_OVERRIDE_CTRL (dev -> cpu_port );
1065- u8 gmii_po ;
1066-
1067- b53_read8 (dev , B53_CTRL_PAGE , po_reg , & gmii_po );
1068- gmii_po |= GMII_PO_LINK |
1069- GMII_PO_RX_FLOW |
1070- GMII_PO_TX_FLOW |
1071- GMII_PO_EN |
1072- GMII_PO_SPEED_2000M ;
1073- b53_write8 (dev , B53_CTRL_PAGE , po_reg , gmii_po );
1102+ b53_force_port_config (dev , dev -> cpu_port , 2000 ,
1103+ DUPLEX_FULL , MLO_PAUSE_TXRX_MASK );
1104+ b53_force_link (dev , dev -> cpu_port , 1 );
10741105 }
10751106 }
10761107
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