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Jerry0443davem330
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net: dsa: LAN9303: Add early read to sync
Add initial BYTE_ORDER read to sync the 32-bit accesses over the 16-bit mdio bus to improve driver robustness. The lan9303 expects two mdio read transactions back-to-back to read a 32-bit register. The first read transaction causes the other half of the 32-bit register to get latched. The subsequent read returns the latched second half of the 32-bit read. The BYTE_ORDER register is an exception to this rule. As it is a constant value, there is no need to latch the second half. We read this register first in case there were reads during the boot loader process that might have occurred prior to this driver taking over ownership of accessing this device. This patch has been tested on the SAMA5D3-EDS with a LAN9303 RMII daughter card. Signed-off-by: Jerry Ray <jerry.ray@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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drivers/net/dsa/lan9303-core.c

Lines changed: 15 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@
3232
#define LAN9303_INT_EN 0x17
3333
# define LAN9303_INT_EN_PHY_INT2_EN BIT(27)
3434
# define LAN9303_INT_EN_PHY_INT1_EN BIT(26)
35+
#define LAN9303_BYTE_ORDER 0x19
3536
#define LAN9303_HW_CFG 0x1D
3637
# define LAN9303_HW_CFG_READY BIT(27)
3738
# define LAN9303_HW_CFG_AMDX_EN_PORT2 BIT(26)
@@ -851,10 +852,6 @@ static int lan9303_check_device(struct lan9303 *chip)
851852
if (ret) {
852853
dev_err(chip->dev, "failed to read chip revision register: %d\n",
853854
ret);
854-
if (!chip->reset_gpio) {
855-
dev_dbg(chip->dev,
856-
"hint: maybe failed due to missing reset GPIO\n");
857-
}
858855
return ret;
859856
}
860857

@@ -1349,6 +1346,7 @@ static int lan9303_probe_reset_gpio(struct lan9303 *chip,
13491346
int lan9303_probe(struct lan9303 *chip, struct device_node *np)
13501347
{
13511348
int ret;
1349+
u32 reg;
13521350

13531351
mutex_init(&chip->indirect_mutex);
13541352
mutex_init(&chip->alr_mutex);
@@ -1359,6 +1357,19 @@ int lan9303_probe(struct lan9303 *chip, struct device_node *np)
13591357

13601358
lan9303_handle_reset(chip);
13611359

1360+
/* First read to the device. This is a Dummy read to ensure MDIO */
1361+
/* access is in 32-bit sync. */
1362+
ret = lan9303_read(chip->regmap, LAN9303_BYTE_ORDER, &reg);
1363+
if (ret) {
1364+
dev_err(chip->dev, "failed to access the device: %d\n",
1365+
ret);
1366+
if (!chip->reset_gpio) {
1367+
dev_dbg(chip->dev,
1368+
"hint: maybe failed due to missing reset GPIO\n");
1369+
}
1370+
return ret;
1371+
}
1372+
13621373
ret = lan9303_check_device(chip);
13631374
if (ret)
13641375
return ret;

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